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18 条记录 (耗时 0.012 秒)

    PROCESSING PLASTICS FILMS
    1.
    发明申请
    PROCESSING PLASTICS FILMS 审中-公开

    公开(公告)号：US20200333651A1

    公开(公告)日：2020-10-22

    申请号：US16851352

    申请日：2020-04-17

    申请人： Flexenable Limited

    发明人： Agaiby Rouzet ,  Jan Jongman

    IPC分类号： G02F1/1333 ,  H01L27/12 ,  B32B43/00

    摘要： A technique comprising: processing a plastics film in situ on a first carrier; thereafter removing the processed plastics film from the first carrier; subjecting the processed plastics film to one or more quality checks; and following a determination that the processed plastics film meets one or more predetermined quality criteria, bonding the processed plastics film to a second carrier; further processing the processed plastics film in situ on the second carrier; and thereafter debonding the further processed plastics film from the second carrier using a process having a higher yield than that of the process of removing the processed plastics film from the first carrier.

    Semiconductor devices
    3.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US11676888B2

    公开(公告)日：2023-06-13

    申请号：US16900646

    申请日：2020-06-12

    申请人： Flexenable Limited

    发明人： Jan Jongman ,  Joffrey Dury

    IPC分类号： H01L23/48 ,  H01L23/498 ,  H01L23/522 ,  H01L23/528

    CPC分类号： H01L23/49822 ,  H01L23/528 ,  H01L23/5226

    摘要： A device including a stack of layers defining a first conductor pattern at a first level of the stack and one or more semiconductor channels in respective regions, connecting a pair of parts of the first conductor pattern, and capacitively coupled via a dielectric to a coupling conductor of a second conductor pattern at a second level of the stack. The stack includes at least two insulator patterns over which the first level or second level conductor patterns is formed. A first insulator pattern occupies one or more semiconductor channel regions to provide the dielectric. The second insulator pattern defines one or more windows in the one or more semiconductor channel regions through which the second conductor pattern contacts the first insulator pattern other than via the second insulator pattern. The second insulator pattern overlaps the first insulator pattern outside the one or more semiconductor channel regions.

    SEMICONDUCTOR DEVICES
    5.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20210184144A1

    公开(公告)日：2021-06-17

    申请号：US17123646

    申请日：2020-12-16

    申请人： Flexenable Limited

    发明人： Jan Jongman ,  Brian Asplin

    IPC分类号： H01L51/10 ,  H01L51/05 ,  H01L27/28

    摘要： A technique, comprising: forming in situ on a support substrate: a first metal layer; a light-absorbing layer after the first metal layer; a conductor pattern after the light-absorbing layer; and a semiconductor layer after the conductor pattern; patterning the semiconductor layer using a resist mask to form a semiconductor pattern defining one or more semiconductor channels of one or more semiconductor devices; and patterning the light-absorbing layer using the resist mask and the conductor pattern, so as to selectively retain the light-absorbing layer in regions that are occupied by at least one of the resist mask and the conductor pattern.

    CONDUCTOR ETCHING FOR PRODUCING THIN-FILM TRANSISTOR DEVICES
    6.
    发明申请
    CONDUCTOR ETCHING FOR PRODUCING THIN-FILM TRANSISTOR DEVICES 审中-公开

    公开(公告)号：US20200251657A1

    公开(公告)日：2020-08-06

    申请号：US16774298

    申请日：2020-01-28

    申请人： Flexenable Limited

    发明人： Jan Jongman ,  Brian Asplin ,  Joffrey Dury

    IPC分类号： H01L51/00 ,  H01L51/05 ,  H01L51/10

    摘要： Method for forming an organic polymer insulator over a first conductor pattern defining a first level of conductors for a thin-film transistor device. A first conductor layer is formed over the organic polymer insulator and a second conductor layer formed over the first conductor layer. The second conductor layer is patterned to define a second level of conductors by exposing the second conductor layer to liquid etchant in selected regions to form a second conductor pattern. The first conductor layer may be located in the selected regions and the first conductor layer and the organic polymer insulator may comprise surface materials that exhibit a substantially zero etch rate for the liquid etchant. The first conductor layer may be less permeable to the liquid etchant than the organic polymer insulator and/or more resistant to damage by the liquid etchant than the organic polymer insulator may be patterned.

    FORMING DIELECTRIC FOR ELECTRONIC DEVICES
    7.
    发明申请
    FORMING DIELECTRIC FOR ELECTRONIC DEVICES 审中-公开

    公开(公告)号：US20200091449A1

    公开(公告)日：2020-03-19

    申请号：US16569778

    申请日：2019-09-13

    申请人： FLEXENABLE LIMITED

    发明人： Jan Jongman ,  Romain Futsch

    IPC分类号： H01L51/05 ,  H01L27/28

    摘要： A method of forming a stack of layers defining one or more electronic devices, the method comprising: depositing a first thickness of curable, dielectric or dielectric precursor material over an area of a workpiece; thereafter exposing the workpiece to curing conditions at least over said area of said workpiece; and without any intermediate patterning operation, thereafter depositing a second thickness of said curable material over said area of said workpiece; and thereafter again exposing the workpiece to curing conditions at least over said area of said workpiece.

    REDUCING UNDESIRABLE CAPACITIVE COUPLING IN TRANSISTOR DEVICES
    8.
    发明申请
    REDUCING UNDESIRABLE CAPACITIVE COUPLING IN TRANSISTOR DEVICES 审中-公开
    在晶体管器件中减少不可接受的电容耦合

    公开(公告)号：US20160308153A1

    公开(公告)日：2016-10-20

    申请号：US15100527

    申请日：2014-12-09

    申请人： FLEXENABLE LIMITED

    发明人： Jan Jongman

    IPC分类号： H01L51/05 ,  H01L51/10 ,  H01L51/00

    CPC分类号： H01L51/055 ,  H01L51/0023 ,  H01L51/0512 ,  H01L51/0541 ,  H01L51/105

    摘要： A transistor device comprising: source and drain conductors connected by a semiconductor channel; and a gate conductor capacitively coupled to the semiconductor channel via a gate dielectric; wherein the gate conductor comprises at least one portion overlapping at least part of at least one of said source and drain conductors; and further comprising a patterned insulator interposed between at least part of said at least one of the source and drain conductors and said at least one overlapping portion of said gate conductor so as to reduce capacitive coupling between the said at least one of the source and drain conductors and the gate conductor by more than any reduction in capacitive coupling between the semiconductor channel and the gate conductor.

    摘要翻译： 一种晶体管器件，包括：由半导体沟道连接的源极和漏极导体; 以及通过栅极电介质电容耦合到所述半导体沟道的栅极导体; 其中所述栅极导体包括与所述源极和漏极导体中的至少一个的至少一部分重叠的至少一个部分; 并且还包括插入在所述源极和漏极导体中的所述至少一个源极和漏极导体的至少一部分与所述栅极导体的所述至少一个重叠部分之间的图案化绝缘体，以便减小所述源极和漏极之间的所述至少一个之间的电容耦合 导体和栅极导体比通过半导体沟道和栅极导体之间​​的电容耦合的任何减小更多。

    Semiconductor devices
    9.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US11508923B2

    公开(公告)日：2022-11-22

    申请号：US17123646

    申请日：2020-12-16

    申请人： Flexenable Limited

    发明人： Jan Jongman ,  Brian Asplin

    IPC分类号： H01L51/10 ,  H01L27/28 ,  H01L51/05 ,  H01L27/12 ,  H01L29/786 ,  H01L51/00 ,  H01L21/027 ,  H01L27/32

    摘要： A technique, comprising: forming in situ on a support substrate: a first metal layer; a light-absorbing layer after the first metal layer; a conductor pattern after the light-absorbing layer; and a semiconductor layer after the conductor pattern; patterning the semiconductor layer using a resist mask to form a semiconductor pattern defining one or more semiconductor channels of one or more semiconductor devices; and patterning the light-absorbing layer using the resist mask and the conductor pattern, so as to selectively retain the light-absorbing layer in regions that are occupied by at least one of the resist mask and the conductor pattern.

    Photodetector device including a photoactive semiconductor over a conductor pattern and method of making the same
    10.
    发明授权
    Photodetector device including a photoactive semiconductor over a conductor pattern and method of making the same 有权

    公开(公告)号：US11469282B2

    公开(公告)日：2022-10-11

    申请号：US16753663

    申请日：2018-10-01

    申请人： Flexenable Limited

    发明人： Brian Asplin ,  Shane Norval ,  Jan Jongman ,  Patrick Too

    IPC分类号： H01L27/32 ,  H01L27/30

    摘要： A technique comprising: forming an insulator over a first conductor pattern; patterning the insulator to form an insulator pattern which exposes the first conductor pattern in one or more via regions; forming a second conductor pattern over the insulator pattern, which second conductor pattern contacts said first conductor pattern in said one or more via regions; creating a more even topographic profile in said one or more via regions, with the second conductor pattern exposed outside the one or more via regions; forming a semiconductor (24) over the second conductor pattern for charge carrier transfer between the second conductor pattern and the semiconductor; and depositing a third conductor (26) over the semiconductor, for charge carrier transfer between the third conductor (26) and the semiconductor (24).