公开(公告)号：US20180145671A1

公开(公告)日：2018-05-24

申请号：US15725905

申请日：2017-10-05

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Woojoo LEE ,  Jae-Jin LEE ,  Sukho LEE ,  Kyuseung HAN ,  Sang Pil KIM ,  Young Hwan BAE

IPC: H03K5/134

CPC classification number: H03K5/134 ,  H03K2005/00143

Abstract: Provided is a semiconductor device including a target circuit, a monitoring circuit, and a voltage controller. The target circuit includes a transistor. The monitoring circuit is configured to measure a temperature of the target circuit or measure a delay time between an input and an output of the target circuit. The voltage controller is configured to adjust a driving voltage for driving the target circuit or a back-bias voltage for adjusting a threshold voltage of the transistor by referring to at least one of the temperature and the delay time. As the temperature increases, the delay time decreases.

公开(公告)号：US20220109808A1

公开(公告)日：2022-04-07

申请号：US17399603

申请日：2021-08-11

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sukho LEE ,  Sang Pil KIM ,  Young Hwan BAE ,  Jae-Jin LEE ,  Kyuseung HAN ,  Tae Wook KANG ,  Sung Eun KIM ,  Hyuk KIM ,  Kyung Hwan PARK ,  Hyung-IL PARK ,  Kyung Jin BYUN ,  Kwang IL OH ,  In Gi LIM

IPC: H04N7/01 ,  H04N7/08

Abstract: Disclosed is a network-on-chip including a first data converter that receives first image data and second image data from at least one image sensor and encodes one image data among the first image data and the second image data, into first data, based on whether the first image data is identical to the second image data and a second data converter that receives non-image data from at least one non-image sensor and encodes the received non-image data into second data. The network-on-chip outputs the first data and the second data to transmit the first data and the second data to an external server at a burst length.

公开(公告)号：US20200092226A1

公开(公告)日：2020-03-19

申请号：US16556905

申请日：2019-08-30

Applicant: Electronics and Telecommunications Research Institute

Inventor： Kyuseung HAN ,  Sukho LEE ,  Jae-Jin LEE ,  Sang Pil KIM ,  Young Hwan BAE ,  Kyung Jin BYUN

IPC: H04L12/933 ,  H04L12/42

Abstract: Provided is a system-on-chip. A central controller is configured to, in response to a request from a host, generate a first signal for requesting error information related to an error from a design of an IP. A local controller is configured to generate a second signal including the error information of the target IP if the request from the host is determined to be for the target IP based on the first signal.

公开(公告)号：US20140373025A1

公开(公告)日：2014-12-18

申请号：US14303964

申请日：2014-06-13

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sang Pil KIM

IPC: G06F9/50

CPC classification number: G06F9/505 ,  G06F2209/501 ,  Y02D10/22

Abstract: Disclosed are a method for allocating processes and an apparatus for allocating processes. The method may comprise determining a core among the plurality of cores to execute a requested process based on the performance information of the plurality of cores; and allocating the requested process to the determined core. According to the present invention, processes are allocated to cores according to a performance demanded by each of the processes so that processing speed of the processes may be enhanced and power consumption of each of the cores may be reduced.

Abstract translation: 公开了一种用于分配过程的方法和用于分配过程的装置。 该方法可以包括：基于多个核心的性能信息确定多个核心之间的核心以执行所请求的进程; 以及将所请求的进程分配给确定的核心。 根据本发明，根据每个处理所要求的性能将处理分配给核，从而可以提高处理的处理速度，并且可以减少每个核的功耗。