Abstract:
An analog-to-digital converter includes a capacitor array including capacitors, an amplifier receiving an input current through an input node and integrating the input current, using the capacitor array, in a first mode, a switch array including switches respectively connected to the capacitors, successive approximation logic performing a successive approximation by selectively connecting each of the capacitors to one of a common voltage and a reference voltage through the switches, in a second mode, a comparator comparing the common voltage with an output of the amplifier and output a pulse signal based on the comparison result, a counter counting the pulse signal in the first mode, a register sequentially storing values of the pulse signal, in the second mode, and error correction logic storing an output of the counter as upper bits and an output of the register as lower bits and performing error correction.
Abstract:
Disclosed is a neural network computing device. The neural network computing device includes a neural network accelerator including an analog MAC, a controller controlling the neural network accelerator in one of a first mode and a second mode, and a calibrator that calibrating a gain and a DC offset of the analog MAC. The calibrator includes a memory storing weight data, calibration weight data, and calibration input data, a gain and offset calculator reading the calibration weight data and the calibration input data from the memory, inputting the calibration weight data and the calibration input data to the analog MAC, receiving calibration output data from the analog MAC, and calculating the gain and the DC offset of the analog MAC, and an on-device quantizer reading the weight data, receiving the gain and the DC offset, generating quantized weight data, based on the gain and the DC offset.
Abstract:
Disclosed is a receiver of a radar device, which includes a sampling circuit that receives a reflected pulse signal having a first period reflected from a detection target and samples the reflected pulse signal as a first received signal in response to a clock signal having a second period equal to the first period, an integration circuit that, in response to the clock signal, generates an analog integration signal based on the first received signal and a control signal, a comparison circuit that, in response to the clock signal, adjusts a count value and the control signal based on a result of comparing the analog integration signal with a reference signal and outputs the control signal to the integration circuit, and an ADC circuit that converts the analog integration signal into a digital integration signal.
Abstract:
An MEMS microphone is provided which includes a reference voltage/current generator configured to generate a DC reference voltage and a reference current; a first noise filter configured to remove a noise of the DC reference voltage; a voltage booster configured to generate a sensor bias voltage using the DC reference voltage the noise of which is removed; a microphone sensor configured to receive the sensor bias voltage and to generate an output value based on a variation in a sound pressure; a bias circuit configured to receive the reference current to generate a bias voltage; and a signal amplification unit configured to receive the bias voltage and the output value of the microphone sensor to amplify the output value. The first noise filter comprises an impedance circuit; a capacitor circuit connected to a output node of the impedance circuit; and a switch connected to both ends of the impedance circuit.
Abstract:
Disclosed is a transmitter which includes a channel driver that includes a pull-up transistor and a pull-down transistor connected between a power node and a ground node and outputs a voltage between the pull-up transistor and the pull-down transistor as a transmit signal, and a pre-driver that controls the pull-up transistor and the pull-down transistor in response to a driving signal and controls the channel driver such that the transmit signal is overshot at a rising edge of the driving signal and the transmit signal is undershot at a falling edge of the driving signal.
Abstract:
Provided is an analog-to-digital converting device. The analog-to-digital converting device may include a determination circuit that determination whether a reference digital signal or a determination digital signal obtained by conversion of a reference voltage or a determination voltage matches a test pattern for the reference voltage, and it is possible to monitor whether the analog-to-digital converting device normally operates, according to whether there is matching.
Abstract:
Disclosed is a simplified sigmoid function circuit which includes a first circuit that performs a computation on input data based on a simplified sigmoid function when a sign of a real region of the input data is positive, a second circuit that performs the computation on the input data based on the simplified sigmoid function when the sign of the real region of the input data is negative, and a first multiplexer that selects and output one of an output of the first circuit and an output of the second circuit, based on the sign of the input data. The simplified sigmoid function is obtained by transforming a sigmoid function of a real region into a sigmoid function of a logarithmic region and performing a variational transformation for the sigmoid function of the logarithmic region.
Abstract:
Provided is a wheel speed sensor interface. The wheel speed sensor interface includes: a speed pulse detection circuit configured to receive a plurality of sensor signals including wheel speed information of a vehicle, detect a plurality of speed pulses on the basis of the plurality of the received sensor signals, and transmit the plurality of the detected speed pulses to an external device; and a comparison speed detection circuit configured to generate a plurality of counting values by counting each of the detected speed pulses, generate comparison speed information by multiplexing the plurality of the generated counting values through a time division method, and transmit the generated comparison speed information to the external device.
Abstract:
Provided is a readout integrated circuit including a sensor signal processing unit receiving sensor signals from a plurality of sensors and converting respectively the sensor signals into voltage signals, a signal converting unit respectively converting the voltage signals into digital signals, a digital signal processing unit outputting digital signals processed in response to the voltage signals and a switching control signal, a power supplying unit generating an internal voltage for operating the signal converting unit and the digital signal processing unit, and a reference sensing voltage for operating the sensor signal processing unit, and a switch unit operating in response to the switching control signal, wherein the switch unit includes switches respectively corresponding to the plurality of sensors and a current amount applied to each sensor is adjusted in response to operation times of the switches.