-
1.发明授权公开(公告)号：US11842764B2
公开(公告)日：2023-12-12
申请号：US17544202
申请日：2021-12-07
Inventor： Jin-Ho Han , Byung-Jo Kim , Ju-Yeob Kim , Hye-Ji Kim , Joo-Hyun Lee , Seong-Min Kim
IPC: G11C11/4096 , G11C11/4093 , G11C11/54 , G06F7/544 , G06N3/063
CPC classification number: G11C11/4096 , G06F7/5443 , G06N3/063 , G11C11/4093 , G11C11/54
Abstract: Disclosed herein is an Artificial Intelligence (AI) processor. The AI processor includes multiple NVM AI cores for respectively performing basic unit operations required for a deep-learning operation based on data stored in NVM; SRAM for storing at least some of the results of the basic unit operations; and an AI core for performing an accumulation operation on the results of the basic unit operation.
-
公开(公告)号：US11449720B2
公开(公告)日：2022-09-20
申请号：US16870412
申请日：2020-05-08
Inventor： Ju-Yeob Kim , Byung Jo Kim , Seong Min Kim , Jin Kyu Kim , Ki Hyuk Park , Mi Young Lee , Joo Hyun Lee , Young-deuk Jeon , Min-Hyung Cho
IPC: G06K9/62
Abstract: Provided is an image recognition device. The image recognition device includes a frame data change detector that sequentially receives a plurality of frame data and detects a difference between two consecutive frame data, an ensemble section controller that sets an ensemble section in the plurality of frame data, based on the detected difference, an image recognizer that sequentially identifies classes respectively corresponding to a plurality of section frame data by applying different neural network classifiers to the plurality of section frame data in the ensemble section, and a recognition result classifier that sequentially identifies ensemble classes respectively corresponding to the plurality of section frame data by combining the classes in the ensemble section.
-
公开(公告)号：US11893392B2
公开(公告)日：2024-02-06
申请号：US17538147
申请日：2021-11-30
Inventor： Ju-Yeob Kim , Jin Ho Han
CPC classification number: G06F9/3885 , G06F9/30036 , G06F9/3887
Abstract: A method for processing floating point operations in a multi-processor system including a plurality of single processor cores is provided. In this method, upon receiving a group setting for performing an operation, the plurality of single processor cores are grouped into at least one group according to the group setting, and a single processor core set as a master in the group loads an instruction for performing the operation from an external memory, and performs parallel operations by utilizing floating point units (FUPs) of all single processor cores in the group according to the instructions.
-
公开(公告)号：US11455539B2
公开(公告)日：2022-09-27
申请号：US16541275
申请日：2019-08-15
Inventor： Mi Young Lee , Byung Jo Kim , Seong Min Kim , Ju-Yeob Kim , Jin Kyu Kim , Joo Hyun Lee
Abstract: An embodiment of the present invention provides a quantization method for weights of a plurality of batch normalization layers, including: receiving a plurality of previously learned first weights of the plurality of batch normalization layers; obtaining first distribution information of the plurality of first weights; performing a first quantization on the plurality of first weights using the first distribution information to obtain a plurality of second weights; obtaining second distribution information of the plurality of second weights; and performing a second quantization on the plurality of second weights using the second distribution information to obtain a plurality of final weights, and thereby reducing an error that may occur when quantizing the weight of the batch normalization layer.
-
公开(公告)号：US11003985B2
公开(公告)日：2021-05-11
申请号：US15806111
申请日：2017-11-07
Inventor： Jin Kyu Kim , Byung Jo Kim , Seong Min Kim , Ju-Yeob Kim , Mi Young Lee , Joo Hyun Lee
Abstract: Provided is a convolutional neural network system including a data selector configured to output an input value corresponding to a position of a sparse weight from among input values of input data on a basis of a sparse index indicating the position of a nonzero value in a sparse weight kernel, and a multiply-accumulate (MAC) computator configured to perform a convolution computation on the input value output from the data selector by using the sparse weight kernel.
-
Patent Agency Ranking
公开(公告)号：US11488003B2
公开(公告)日：2022-11-01
申请号：US16409437
申请日：2019-05-10
Inventor： Ju-Yeob Kim , Byung Jo Kim , Seong Min Kim , Jin Kyu Kim , Mi Young Lee , Joo Hyun Lee
Abstract: An artificial neural network apparatus and an operating method including a plurality of layer processors for performing operations on input data are disclosed. The artificial neural network apparatus may include: a flag layer processor for outputting a flag according to a comparison result between a pooling output value of a current frame and a pooling output value of a previous frame; and a controller for stopping operation of a layer processor which performs operations after the flag layer processor among the plurality of layer processors when the flag is outputted from the flag layer processor, wherein the flag layer processor is a layer processor that performs a pooling operation first among the plurality of layer processors.
-
公开(公告)号：US10319115B2
公开(公告)日：2019-06-11
申请号：US15698499
申请日：2017-09-07
Inventor： Seong Mo Park , Sung Eun Kim , Ju-Yeob Kim , Jin Kyu Kim , Kwang Il Oh , Joo Hyun Lee
Abstract: Provided is an image compression device including an object extracting unit configured to perform convolution neural network (CNN) training and identify an object from an image received externally, a parameter adjusting unit configured to adjust a quantization parameter of a region in which the identified object is included in the image on the basis of the identified object, and an image compression unit configured to compress the image on the basis of the adjusted quantization parameter.
-
公开(公告)号：US09311916B2
公开(公告)日：2016-04-12
申请号：US14667675
申请日：2015-03-24
Inventor： Ju-Yeob Kim , Bon-Tae Koo , Tae-Joong Kim
CPC classification number: G10L15/20 , G10L15/02 , G10L21/0208 , G10L25/24
Abstract: An apparatus and method for improving voice recognition are disclosed herein. The apparatus includes a standard voice transmission unit, a Mel-frequency cepstrum coefficient (MFCC) generation unit, and an MFCC compensation unit. The standard voice transmission unit generates a standard voice. The MFCC generation unit generates voice feature data (MFCC) based on the utterance of the standard voice before voice recognition. The MFCC compensation unit stores a gain value generated based on the standard voice, and compensates for the distortion of the voice feature data based on the utterance of a user using the gain value during the voice recognition.
Abstract translation: 本文公开了一种用于改善语音识别的装置和方法。 该装置包括标准语音发送单元，梅尔频率倒谱系数（MFCC）生成单元和MFCC补偿单元。 标准语音传输单元产生标准语音。 MFCC生成单元基于语音识别之前的标准语音的发音来生成语音特征数据（MFCC）。 MFCC补偿单元存储基于标准语音生成的增益值，并且基于在语音识别期间使用增益值的用户的话语来补偿语音特征数据的失真。
-
公开(公告)号：US11494630B2
公开(公告)日：2022-11-08
申请号：US16742808
申请日：2020-01-14
Inventor： Young-deuk Jeon , Byung Jo Kim , Ju-Yeob Kim , Jin Kyu Kim , Ki Hyuk Park , Mi Young Lee , Joo Hyun Lee , Min-Hyung Cho
Abstract: The neuromorphic arithmetic device comprises an input monitoring circuit that outputs a monitoring result by monitoring that first bits of at least one first digit of a plurality of feature data and a plurality of weight data are all zeros, a partial sum data generator that skips an arithmetic operation that generates a first partial sum data corresponding to the first bits of a plurality of partial sum data in response to the monitoring result while performing the arithmetic operation of generating the plurality of partial sum data, based on the plurality of feature data and the plurality of weight data, and a shift adder that generates the first partial sum data with a zero value and result data, based on second partial sum data except for the first partial sum data among the plurality of partial sum data and the first partial sum data generated with the zero value.
-
公开(公告)号：US11204876B2
公开(公告)日：2021-12-21
申请号：US16953242
申请日：2020-11-19
Inventor： Byung Jo Kim , Joo Hyun Lee , Seong Min Kim , Ju-Yeob Kim , Jin Kyu Kim , Mi Young Lee
IPC: G06F12/08 , G06F12/0862 , G06N3/063 , G06F13/16 , G06F12/02
Abstract: A method for controlling a memory from which data is transferred to a neural network processor and an apparatus thereof are provided, the method including: generating prefetch information of data by using a blob descriptor and a reference prediction table after history information is input; reading the data in the memory based on the pre-fetch information and temporarily archiving read data in a prefetch buffer; and accessing next data in the memory based on the prefetch information and temporarily archiving the next data in the prefetch buffer after the data is transferred to the neural network from the prefetch buffer.
-
-
-
-
-
-
-
-
-
Search Results
11
records
(took 0.016 seconds)
