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公开(公告)号：US10425075B1
公开(公告)日：2019-09-24
申请号：US15966265
申请日：2018-04-30
摘要： Driver circuits with S-shaped gate drive voltage curves for ramp-up and ramp-down of power field effect transistors are presented. In ramp-up, the S-shaped curve rapidly ramps the gate voltage of the power FET to its threshold. This ramp-up is self-terminating. The gate voltage of the power FET is slewed through saturation with a time constant. After a predetermined time, the gate of the power FET is driven to approach the supply voltage level. In ramp-down, the S-shaped curve rapidly ramps the gate voltage of the power FET down to its threshold voltage. This ramp-down is self-terminating. The gate voltage of the power FET is slewed through saturation. The gate-source voltage of the power FET is rapidly ramped down to zero. Such S-shaped curves for the gate drive signal allow the control of the transition times of the gate drive signal to acceptable levels of voltage/current spikes and electromagnetic interference.
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公开(公告)号：US11888394B2
公开(公告)日：2024-01-30
申请号：US17462985
申请日：2021-08-31
CPC分类号： H02M3/156 , H02M1/08 , H03K5/24 , H02M1/0048
摘要： A switching power converter is provided with a one-shot bias boosting circuit that responds to a premature trip point to boost the performance of a linear comparator in a pulse width modulator. In a sense-amplifier based implementation of the comparator, a clock-edge generator boosts the performance of the sense amplifier at the premature trip point.
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公开(公告)号：US11005372B2
公开(公告)日：2021-05-11
申请号：US16730059
申请日：2019-12-30
发明人： Kevin Yi Cheng Chang
摘要： A multi-phase switching power converter is disclosed in which the duty cycle of active phases following a phase shedding transition is temporarily adjusted to increase the operating speed of the multi-phase switching power converter.
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4.发明授权公开(公告)号：US10181794B1
公开(公告)日：2019-01-15
申请号：US16047645
申请日：2018-07-27
发明人： Kevin Yi Cheng Chang , James Doyle , Erik Mentze
摘要： A two-stage multi-phase switching power converter operates its first stage during nominal operation responsive to a nominal clocking frequency and operates its second stage during the nominal operation responsive to a second-stage clocking frequency that is greater than the nominal clocking frequency. In response to an application of a load, the first stage temporarily increases its clocking frequency from the nominal clocking frequency and implements a fixed duty cycle.
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公开(公告)号：US11108321B2
公开(公告)日：2021-08-31
申请号：US16450829
申请日：2019-06-24
摘要： A pulse-width-modulated switching power converter is provided in which a comparator has a boosted speed to determine a trip point at which a ramp signal equals an error signal. In a linear comparator embodiment, a one-shot bias boosting circuit triggers an increased bias current to the linear comparator to boost the speed to determine the trip point. In a sense-amplifier-based comparator embodiment, a clock generator enables the sense-amplifier-based comparator prior to the trip point.
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公开(公告)号：US10523124B1
公开(公告)日：2019-12-31
申请号：US16014986
申请日：2018-06-21
发明人： Kevin Yi Cheng Chang
摘要： A multi-phase switching power converter is disclosed in which the duty cycle of active phases following a phase shedding transition is temporarily adjusted to increase the operating speed of the multi-phase switching power converter.
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公开(公告)号：US20210399636A1
公开(公告)日：2021-12-23
申请号：US17462985
申请日：2021-08-31
摘要： A switching power converter is provided with a one-shot bias boosting circuit that responds to a premature trip point to boost the performance of a linear comparator in a pulse width modulator. In a sense-amplifier based implementation of the comparator, a clock-edge generator boosts the performance of the sense amplifier at the premature trip point.
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8.发明申请公开(公告)号：US20190393786A1
公开(公告)日：2019-12-26
申请号：US16014986
申请日：2018-06-21
发明人： Kevin Yi Cheng Chang
摘要： A multi-phase switching power converter is disclosed in which the duty cycle of active phases following a phase shedding transition is temporarily adjusted to increase the operating speed of the multi-phase switching power converter.
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公开(公告)号：US10432088B1
公开(公告)日：2019-10-01
申请号：US16000715
申请日：2018-06-05
发明人： Kevin Yi Cheng Chang
摘要： A two-stage power converter is disclosed in which a second stage may command a first stage to adjust an output voltage from the first stage to compensate for PVT variations in the second stage. Alternatively, the second stage may adjust a clocking frequency to compensate for the PVT variations.
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公开(公告)号：US10199939B1
公开(公告)日：2019-02-05
申请号：US16036546
申请日：2018-07-16
发明人： Kevin Yi Cheng Chang , James Doyle , Qing Li , Xiaoying Yu , Ibiyemi Omole , Jonathon Stiff , Erik Mentze , Aysel Yildiz
摘要： A multi-phase switching power converter includes a panic mode detector that triggers the activation of each phase in an open-loop mode of operation in which an open-loop duty cycle is used that is greater than a closed-loop duty cycle used during closed-loop operation for the active phases.
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