Inverter capable of operating in multiple states

    公开(公告)号:US11984818B2

    公开(公告)日:2024-05-14

    申请号:US17681922

    申请日:2022-02-28

    Inventor: Ken Toshiyuki

    CPC classification number: H02M7/487 H02M1/325 H02M7/537

    Abstract: In an inverter, three switching circuits each include first to fourth switching elements, first and second diodes, and a control circuit controlling potentials of gates. The control circuit causes potentials of U-, V-, and W-phase output wirings to change among high, neutral point, and low potentials. The control circuit performs an emergency operation when any of the second and third switching elements and the first and second diodes has caused a short fault. In the emergency operation, a potential of a limit output wiring is caused to change between two potentials that are not inhibiting potentials, and potentials of normal output wirings are caused to change among three potentials. When the short-fault element is the second switching element or the second diode, an inhibiting potential is the low potential. When the short-fault element is the third switching element or the first diode, the inhibiting potential is the high potential.

    Drive circuit for switch
    2.
    发明授权

    公开(公告)号:US10742210B2

    公开(公告)日:2020-08-11

    申请号:US16592870

    申请日:2019-10-04

    Abstract: A drive circuit drives switches that are connected to each other in parallel. The drive circuit includes individual discharge paths, a common discharge path, blocking units, a discharge switch, off-holding switches, and a drive control unit. The drive control unit selects, as target switches to be driven to be turned on, at least two switches among the switches. The at least two switches include a first switch and a second switch. The first switch is last to be switched to an off-state among the at least two switches that are selected as the target switches and switched to an on-state. The second switch is other than the first switch among the at least two switches. The off-holding switches includes a first off-holding switch and a second off-holding switch. After switching the second off-holding switch to an on-state, the drive control unit switches the discharge switch to an on-state.

    Switching circuit
    3.
    发明授权

    公开(公告)号:US10256330B2

    公开(公告)日:2019-04-09

    申请号:US15824578

    申请日:2017-11-28

    Abstract: A switching circuit may be provided with: a parallel circuit including a first IGBT and a second IGBT connected in parallel; a controller configured to receive a signal indicating a turn-on timing and a turn-off timing. The controller is configured to: turn on both of the first and second IGBTs at the turn-on timing, execute a first control in which one of the first and second IGBTs is turned off before the turn-off timing and the other of the first and second IGBTs is turned off at the turn-off timing in a case where current flowing through the parallel circuit is equal to or lower than a threshold value, and execute a second control in which both of the first and second IGBTs are turned off at the turn-off timing in a case where the current flowing through the parallel circuit is higher than the threshold value.

    Motor system
    5.
    发明授权

    公开(公告)号:US11146202B2

    公开(公告)日:2021-10-12

    申请号:US16775397

    申请日:2020-01-29

    Abstract: A motor system may include three switching circuits, each of which includes two upper switching elements and two lower switching elements. A controller includes a signal output module, a signal distribution module, and a signal adjusting module. The signal output module outputs upper and lower PWM signals. The signal distribution module distributes each of the upper (lower) PWM signals alternately to the first upper (lower) switching element and the second upper (lower) switching element of corresponding one of the switching circuits. The signal adjusting module inverts all the PWM signals output by the signal output module when (1) each of currents flowing through two of the three coils has a negative value and all the three upper PWM signals are at HIGH level, or (2) each of currents flowing through two of the three coils has a positive value and all the three lower PWM signals are at LOW level.

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