Downstream node setup
    1.
    发明授权

    公开(公告)号:US10594399B2

    公开(公告)日:2020-03-17

    申请号:US16249342

    申请日:2019-01-16

    Abstract: Per-port performance optimization may be provided. First, performance data may be received corresponding to each of a plurality of ports. Then it may be determined that performance of at least one of the plurality of ports can be improved based on the received performance data corresponding to the least one of the plurality of ports. Next, in response to determining that the performance of the at least one of the plurality of ports can be improved, at least one of a plurality of components may be adjusted corresponding to the at least one of the plurality of ports to improve performance of the least one of the plurality of ports.

    Reducing dynamic power in cable access networks

    公开(公告)号:US10938478B2

    公开(公告)日:2021-03-02

    申请号:US16542977

    申请日:2019-08-16

    Abstract: Dynamic power in cable access networks may be reduced. First, a peak data rate associated with a network may be determined. Then, a modulation order and an associated Radio Frequency (RF) level that will support the determined peak data rate may be determined. Next, a power value to be transmitted by a node in the network based on the determined modulation order and the associated RF level may be determined. A bias value may then be determined for the node to support the determined power value.

    Three-piece electronics enclosure

    公开(公告)号:US10784664B2

    公开(公告)日:2020-09-22

    申请号:US15911382

    申请日:2018-03-05

    Abstract: A three-piece electronics enclosure may be provided. The electronics enclosure may comprise a back housing, a lid, and a center frame. The back housing may comprise back housing heat sinks on an exterior of the back housing and back housing circuitry disposed in an interior of the back housing. The lid may comprise lid heat sinks on an exterior of the lid and lid circuitry disposed in an interior of the lid. The center frame may be disposed between the back housing and the lid. The center frame may comprise a plurality of input/output (I/O) ports comprising a first I/O port and a second I/O port. At least one of the plurality of I/O ports may provide power to the back housing circuitry and the lid circuitry. The center frame may further comprise a power bypass that passes power between the first I/O port and the second I/O port.

    Full duplex (FDX) enhanced node
    4.
    发明授权

    公开(公告)号:US10523270B1

    公开(公告)日:2019-12-31

    申请号:US16008737

    申请日:2018-06-14

    Abstract: Full Duplex (FDX) enhanced node deployment may be provided. First, a first device level may be provided comprising a first plurality of FDX enhanced nodes. The first plurality of FDX enhanced nodes may comprise a first FDX enhanced node and a second FDX enhanced node. The first plurality of FDX enhanced nodes may be operated in a first mode. Next, a second device level may be provided comprising a third FDX enhanced node. The second device level may be upstream from the first device level. The third FDX enhanced node may be operated in a second mode. Then an input port of the first FDX enhanced node and an input port of the second FDX enhanced node may be provided with a same type of input that is being provided to an input port of the third FDX enhanced node. The first plurality of FDX enhanced nodes may then be switched from being operated in the first mode to being operated in the second mode.

    Downstream node setup
    6.
    发明授权

    公开(公告)号:US10187149B2

    公开(公告)日:2019-01-22

    申请号:US15587449

    申请日:2017-05-05

    Abstract: Per-port performance optimization may be provided. First, performance data may be received corresponding to each of a plurality of ports. Then it may be determined that performance of at least one of the plurality of ports can be improved based on the received performance data corresponding to the least one of the plurality of ports. Next, in response to determining that the performance of the at least one of the plurality of ports can be improved, at least one of a plurality of components may be adjusted corresponding to the at least one of the plurality of ports to improve performance of the least one of the plurality of ports.

Patent Agency Ranking