公开(公告)号：US20100327284A1

公开(公告)日：2010-12-30

申请号：US12559508

申请日：2009-09-15

申请人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

发明人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

IPC分类号： H01L27/12

CPC分类号： H01L27/12 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/136286 ,  H01L27/124

摘要： An active device array substrate including a first patterned conductive layer, a dielectric layer, a second patterned conductive layer, a passivation layer and pixel electrodes is provided. The first patterned conductive layer includes scan lines, common lines, gates and strip floating shielding patterns. The dielectric layer covering the first patterned conductive layer has first contact holes which expose a portion of the common lines, respectively. The second patterned conductive layer includes data lines, sources, drains and strip capacitance electrodes. Each strip capacitance electrode is electrically connected to one of the common lines through one of the first contact holes. A gap is formed between each data line and one strip capacitance electrode, and the strip floating shielding patterns are disposed under the data lines, the gap and the strip capacitance electrodes. Each pixel electrode is electrically connected to one of the drains through one of the second contact holes.

摘要翻译： 提供了包括第一图案化导电层，电介质层，第二图案化导电层，钝化层和像素电极的有源器件阵列衬底。 第一图案化导电层包括扫描线，公共线，栅极和条状浮动屏蔽图案。 覆盖第一图案化导电层的电介质层具有分别露出公共线的一部分的第一接触孔。 第二图案化导电层包括数据线，源极，漏极和带状电容电极。 每个带状电容电极通过第一接触孔中的一个电连接到一条公共线。 在每个数据线和一个带状电容电极之间形成间隙，并且带状浮动屏蔽图案设置在数据线，间隙和带状电容电极之下。 每个像素电极通过其中一个第二接触孔电连接到一个漏极。

公开(公告)号：US08643017B2

公开(公告)日：2014-02-04

申请号：US13570266

申请日：2012-08-09

申请人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

发明人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

IPC分类号： H01L31/00

CPC分类号： H01L27/12 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/136286 ,  H01L27/124

摘要： An active device array substrate including a first patterned conductive layer, a dielectric layer, a second patterned conductive layer, a passivation layer and pixel electrodes is provided. The first patterned conductive layer includes scan lines, common lines, gates and strip floating shielding patterns. The dielectric layer covering the first patterned conductive layer has first contact holes which expose a portion of the common lines, respectively. The second patterned conductive layer includes data lines, sources, drains and strip capacitance electrodes. Each strip capacitance electrode is electrically connected to one of the common lines through one of the first contact holes. A gap is formed between each data line and one strip capacitance electrode, and the strip floating shielding patterns are disposed under the data lines, the gap and the strip capacitance electrodes. Each pixel electrode is electrically connected to one of the drains through one of the second contact holes.

摘要翻译： 提供了包括第一图案化导电层，电介质层，第二图案化导电层，钝化层和像素电极的有源器件阵列衬底。 第一图案化导电层包括扫描线，公共线，栅极和条状浮动屏蔽图案。 覆盖第一图案化导电层的电介质层具有分别露出公共线的一部分的第一接触孔。 第二图案化导电层包括数据线，源极，漏极和带状电容电极。 每个带状电容电极通过第一接触孔中的一个电连接到一条公共线。 在每个数据线和一个带状电容电极之间形成间隙，并且带状浮动屏蔽图案设置在数据线，间隙和带状电容电极之下。 每个像素电极通过其中一个第二接触孔电连接到一个漏极。

公开(公告)号：US20120299004A1

公开(公告)日：2012-11-29

申请号：US13570266

申请日：2012-08-09

申请人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

发明人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

IPC分类号： H01L33/62

CPC分类号： H01L27/12 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/136286 ,  H01L27/124

摘要： An active device array substrate including a first patterned conductive layer, a dielectric layer, a second patterned conductive layer, a passivation layer and pixel electrodes is provided. The first patterned conductive layer includes scan lines, common lines, gates and strip floating shielding patterns. The dielectric layer covering the first patterned conductive layer has first contact holes which expose a portion of the common lines, respectively. The second patterned conductive layer includes data lines, sources, drains and strip capacitance electrodes. Each strip capacitance electrode is electrically connected to one of the common lines through one of the first contact holes. A gap is formed between each data line and one strip capacitance electrode, and the strip floating shielding patterns are disposed under the data lines, the gap and the strip capacitance electrodes. Each pixel electrode is electrically connected to one of the drains through one of the second contact holes.

摘要翻译： 提供了包括第一图案化导电层，电介质层，第二图案化导电层，钝化层和像素电极的有源器件阵列衬底。 第一图案化导电层包括扫描线，公共线，栅极和条状浮动屏蔽图案。 覆盖第一图案化导电层的电介质层具有分别露出公共线的一部分的第一接触孔。 第二图案化导电层包括数据线，源极，漏极和带状电容电极。 每个带状电容电极通过第一接触孔中的一个电连接到一条公共线。 在每个数据线和一个带状电容电极之间形成间隙，并且带状浮动屏蔽图案设置在数据线，间隙和带状电容电极之下。 每个像素电极通过其中一个第二接触孔电连接到一个漏极。

公开(公告)号：US08304770B2

公开(公告)日：2012-11-06

申请号：US12559508

申请日：2009-09-15

申请人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

发明人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

IPC分类号： H01L31/00

CPC分类号： H01L27/12 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/136286 ,  H01L27/124

摘要： An active device array substrate including a first patterned conductive layer, a dielectric layer, a second patterned conductive layer, a passivation layer and pixel electrodes is provided. The first patterned conductive layer includes scan lines, common lines, gates and strip floating shielding patterns. The dielectric layer covering the first patterned conductive layer has first contact holes which expose a portion of the common lines, respectively. The second patterned conductive layer includes data lines, sources, drains and strip capacitance electrodes. Each strip capacitance electrode is electrically connected to one of the common lines through one of the first contact holes. A gap is formed between each data line and one strip capacitance electrode, and the strip floating shielding patterns are disposed under the data lines, the gap and the strip capacitance electrodes. Each pixel electrode is electrically connected to one of the drains through one of the second contact holes.

摘要翻译： 提供了包括第一图案化导电层，电介质层，第二图案化导电层，钝化层和像素电极的有源器件阵列衬底。 第一图案化导电层包括扫描线，公共线，栅极和条状浮动屏蔽图案。 覆盖第一图案化导电层的电介质层具有分别露出公共线的一部分的第一接触孔。 第二图案化导电层包括数据线，源极，漏极和带状电容电极。 每个带状电容电极通过第一接触孔中的一个电连接到一条公共线。 在每个数据线和一个带状电容电极之间形成间隙，并且带状浮动屏蔽图案设置在数据线，间隙和带状电容电极之下。 每个像素电极通过其中一个第二接触孔电连接到一个漏极。

公开(公告)号：US20110128214A1

公开(公告)日：2011-06-02

申请号：US12720675

申请日：2010-03-10

申请人： Chou-Chin Wu ,  I-Chun Chen ,  Ming-Hung Shih ,  Chu-Yu Liu

发明人： Chou-Chin Wu ,  I-Chun Chen ,  Ming-Hung Shih ,  Chu-Yu Liu

IPC分类号： G09G3/36

CPC分类号： G02F1/136286 ,  G02F2201/121 ,  G02F2201/122

摘要： A display panel includes an array substrate, an opposite substrate and a display medium layer. A plurality of ring-like common lines of the array substrate are respectively located between two adjacent scan lines, and a plurality of date lines intersect with the scan lines and the ring-like common lines. Each pixel unit of the array substrate includes an active device, a pixel electrode and a connecting line. Each of the connecting line intersects with one of the scan lines and is electrically connected to the two adjacent ring-like common lines so as to connect the ring-like common lines to form a meshed common line. A transparent region is defined by a black matrix layer of the opposite substrate and the ring-like common lines. The black matrix layer does not cover the ring-like common lines at the corner of the transparent region near the connecting lines.

摘要翻译： 显示面板包括阵列基板，相对基板和显示介质层。 阵列基板的多个环状共同线分别位于两条相邻的扫描线之间，并且多条日期线与扫描线和环状公共线相交。 阵列基板的每个像素单元包括有源器件，像素电极和连接线。 每个连接线与扫描线之一相交，并且电连接到两个相邻的环形公共线，以便连接环状公共线以形成网状公共线。 透明区域由相对基板的黑矩阵层和环状公共线限定。 黑色矩阵层不覆盖连接线附近的透明区域的拐角处的环状共同线。

公开(公告)号：US20090224640A1

公开(公告)日：2009-09-10

申请号：US12099295

申请日：2008-04-08

申请人： Chun-Yu Yang ,  Chun-Ying Yang ,  Yi-Hsuan Chen ,  Ming-Hung Shih ,  Chun-Hsien Wu

发明人： Chun-Yu Yang ,  Chun-Ying Yang ,  Yi-Hsuan Chen ,  Ming-Hung Shih ,  Chun-Hsien Wu

IPC分类号： A47B81/00 ,  G06F1/16

CPC分类号： G06F1/187

摘要： A chassis structure of an electronic device includes a chassis and two hard disk drive (HDD) mobile racks of different sizes. The chassis has two expansion slots of different sizes. The smaller mobile rack carries a plurality of hard disk drives and is directly installed into the smaller expansion slot. Alternatively, the smaller mobile rack carrying the hard disk drives may also be first assembled into the larger mobile rack and then installed into the larger expansion slot together with the larger mobile rack, such that the hard disk drives are installed into all the expansion slots in the chassis.

摘要翻译： 电子设备的底盘结构包括底盘和两个不同尺寸的硬盘驱动器（HDD）移动机架。 底盘有两个不同尺寸的扩展槽。 较小的移动机架携带多个硬盘驱动器，并直接安装在较小的扩展槽中。 或者，携带硬盘驱动器的较小移动机架也可以首先组装到更大的移动机架中，然后与更大的移动机架一起安装到较大的扩展槽中，使得硬盘驱动器安装到所有扩展槽中 底盘。

公开(公告)号：US20090213559A1

公开(公告)日：2009-08-27

申请号：US12099282

申请日：2008-04-08

申请人： Chun-Ying Yang ,  Yi-Hsuan Chen ,  Ming-Hung Shih

发明人： Chun-Ying Yang ,  Yi-Hsuan Chen ,  Ming-Hung Shih

IPC分类号： H05K5/02

CPC分类号： G06F1/185 ,  H05K7/1487

摘要： A chassis structure with interface card bracket is described, which uses a bracket to assemble an interface card in an accommodation space within a chassis. The bracket includes a carrying member and an operating member that are pivoted to each other, and the interface card is fixed on the carrying member. The chassis includes a guide portion disposed therein. As the bracket moves into the accommodation space, the carrying member and the operating member are pivoted with respect to each other upon being guided by the guide portion to form an appropriate included angle there-between, so as to avoid barriers around the accommodation space, thereby assembling the interface card into the accommodation space successfully.

摘要翻译： 描述了具有接口卡支架的底盘结构，其使用支架将接口卡组装在机架内的容纳空间中。 托架包括彼此枢转的承载构件和操作构件，并且接口卡固定在承载构件上。 底盘包括设置在其中的引导部。 当支架移动到容纳空间中时，承载构件和操作构件在被引导部分引导时相对于彼此枢转以在其之间形成适当的夹角，以避免围绕容纳空间的障碍物， 从而将接口卡成功地组装到容纳空间中。

公开(公告)号：US20090148973A1

公开(公告)日：2009-06-11

申请号：US12271516

申请日：2008-11-14

申请人： Mao-Tsun Huang ,  Ming-Hung Shih

发明人： Mao-Tsun Huang ,  Ming-Hung Shih

IPC分类号： H01L21/00

CPC分类号： G02F1/1362 ,  G02F1/136209 ,  G02F2001/136231

摘要： A method of fabricating a pixel structure of liquid crystal display is described. A transparent conductive layer and a first metal layer are formed over a substrate sequentially. The first metal layer and the transparent conductive layer are patterned to form a gate pattern and a pixel electrode pattern. A gate insulating layer and a semiconductor layer are formed over the substrate sequentially. A patterning process is performed to preserve the semiconductor layer and the gate insulating layer above the gate pattern and remove the first metal layer of the pixel electrode pattern. A second metal layer is formed over the substrate. The second metal layer is patterned to form a source pattern and a drain pattern. A black material layer is formed over the substrate, and then the black material layer is patterned to form a black matrix pattern uncovering the transparent conductive layer of the pixel electrode pattern.

摘要翻译： 描述制造液晶显示器的像素结构的方法。 顺序地在衬底上形成透明导电层和第一金属层。 图案化第一金属层和透明导电层以形成栅极图案和像素电极图案。 顺序地在衬底上形成栅极绝缘层和半导体层。 执行图案化处理以保持栅极图案上方的半导体层和栅极绝缘层，并去除像素电极图案的第一金属层。 第二金属层形成在衬底上。 将第二金属层图案化以形成源图案和漏极图案。 在衬底上形成黑色材料层，然后将黑色材料层图案化以形成露出像素电极图案的透明导电层的黑色矩阵图案。

公开(公告)号：US20070238217A1

公开(公告)日：2007-10-11

申请号：US11553535

申请日：2006-10-27

申请人： Ming-Hung Shih

发明人： Ming-Hung Shih

IPC分类号： H01L21/00

CPC分类号： G02F1/136209 ,  G02F2001/136222

摘要： A method for manufacturing a liquid crystal display includes the following steps. First, source/drain and a bottom electrode are formed over a color filter substrate with a color filter layer. The next step forms source/drain junction regions over the source/drain. A channel region is also formed between the source/drain in this step. A gate dielectric layer and a gate are formed over the channel region and the source/drain junction regions in this step as well. Moreover, a plurality of stack layers and an upper electrode are formed over the bottom electrode in this step, too. Then, a pixel electrode is formed to electrically connect one of the source/drain and the bottom electrode. Then, a passivation layer pattern is formed to cover the source/drain, the gate, the upper electrode and the bottom electrode by backside exposure. Finally, a plurality of steps are performed to finish the liquid crystal display.

摘要翻译： 一种制造液晶显示器的方法包括以下步骤。 首先，在具有滤色器层的滤色器基板上形成源极/漏极和底部电极。 下一步在源极/漏极上形成源极/漏极结区域。 在该步骤中，在源极/漏极之间也形成沟道区。 在该步骤中，在沟道区域和源极/漏极结区域上形成栅极介电层和栅极。 此外，在该步骤中，在底部电极上形成多个堆叠层和上部电极。 然后，形成像素电极以电连接源极/漏极和底部电极之一。 然后，通过背面曝光形成钝化层图案以覆盖源极/漏极，栅极，上部电极和底部电极。 最后，执行多个步骤来完成液晶显示。

公开(公告)号：US09251750B2

公开(公告)日：2016-02-02

申请号：US13379650

申请日：2011-12-02

申请人： Ming-Hung Shih ,  Meng Li

发明人： Ming-Hung Shih ,  Meng Li

IPC分类号： G02F1/13 ,  G09G3/36 ,  G09G3/00 ,  G02F1/1362 ,  G02F1/1333

CPC分类号： G09G3/3648 ,  G02F1/1303 ,  G02F1/1309 ,  G02F2001/133302 ,  G02F2001/136254 ,  G02F2201/54 ,  G09G3/006

摘要： A liquid crystal display (LCD) module is disclosed, which comprises: a thin film transistor (TFT) substrate and a color filter (CF) substrate disposed opposite to each other, and a liquid crystal layer sandwiched between the TFT substrate and the CF substrate. The TFT substrate comprises a plurality of wires including at least a first group of wires and a second group of wires, and the second group of wires comprises at least two wires. The CF substrate comprises first curing test units and second curing test units insulated from each other. The first curing test units are electrically connected with the first group of wires, and the second curing test units are electrically connected with all the wires of the second group of wires. A manufacturing method of an LCD module is further disclosed. The LCD module and the manufacturing method thereof of the present disclosure can avoid occurrence of arcing in the TFT substrate during the CVD process, thereby improving the product yield and reducing the manufacturing cost.

摘要翻译： 公开了一种液晶显示器（LCD）模块，其包括：彼此相对布置的薄膜晶体管（TFT）基板和滤色器（CF）基板，以及夹在TFT基板和CF基板之间的液晶层 。 TFT基板包括包括至少第一组导线和第二组导线的多个导线，并且第二组导线包括至少两根导线。 CF基板包括彼此绝缘的第一固化测试单元和第二固化测试单元。 第一固化测试单元与第一组导线电连接，第二固化测试单元与第二组导线的所有导线电连接。 进一步公开了一种LCD模块的制造方法。 本公开的LCD模块及其制造方法可以避免在CVD工艺期间在TFT基板中产生电弧，从而提高产品产量并降低制造成本。