公开(公告)号：US20120299004A1

公开(公告)日：2012-11-29

申请号：US13570266

申请日：2012-08-09

申请人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

发明人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

IPC分类号： H01L33/62

CPC分类号： H01L27/12 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/136286 ,  H01L27/124

摘要： An active device array substrate including a first patterned conductive layer, a dielectric layer, a second patterned conductive layer, a passivation layer and pixel electrodes is provided. The first patterned conductive layer includes scan lines, common lines, gates and strip floating shielding patterns. The dielectric layer covering the first patterned conductive layer has first contact holes which expose a portion of the common lines, respectively. The second patterned conductive layer includes data lines, sources, drains and strip capacitance electrodes. Each strip capacitance electrode is electrically connected to one of the common lines through one of the first contact holes. A gap is formed between each data line and one strip capacitance electrode, and the strip floating shielding patterns are disposed under the data lines, the gap and the strip capacitance electrodes. Each pixel electrode is electrically connected to one of the drains through one of the second contact holes.

摘要翻译： 提供了包括第一图案化导电层，电介质层，第二图案化导电层，钝化层和像素电极的有源器件阵列衬底。 第一图案化导电层包括扫描线，公共线，栅极和条状浮动屏蔽图案。 覆盖第一图案化导电层的电介质层具有分别露出公共线的一部分的第一接触孔。 第二图案化导电层包括数据线，源极，漏极和带状电容电极。 每个带状电容电极通过第一接触孔中的一个电连接到一条公共线。 在每个数据线和一个带状电容电极之间形成间隙，并且带状浮动屏蔽图案设置在数据线，间隙和带状电容电极之下。 每个像素电极通过其中一个第二接触孔电连接到一个漏极。

公开(公告)号：US08304770B2

公开(公告)日：2012-11-06

申请号：US12559508

申请日：2009-09-15

申请人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

发明人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

IPC分类号： H01L31/00

CPC分类号： H01L27/12 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/136286 ,  H01L27/124

摘要： An active device array substrate including a first patterned conductive layer, a dielectric layer, a second patterned conductive layer, a passivation layer and pixel electrodes is provided. The first patterned conductive layer includes scan lines, common lines, gates and strip floating shielding patterns. The dielectric layer covering the first patterned conductive layer has first contact holes which expose a portion of the common lines, respectively. The second patterned conductive layer includes data lines, sources, drains and strip capacitance electrodes. Each strip capacitance electrode is electrically connected to one of the common lines through one of the first contact holes. A gap is formed between each data line and one strip capacitance electrode, and the strip floating shielding patterns are disposed under the data lines, the gap and the strip capacitance electrodes. Each pixel electrode is electrically connected to one of the drains through one of the second contact holes.

摘要翻译： 提供了包括第一图案化导电层，电介质层，第二图案化导电层，钝化层和像素电极的有源器件阵列衬底。 第一图案化导电层包括扫描线，公共线，栅极和条状浮动屏蔽图案。 覆盖第一图案化导电层的电介质层具有分别露出公共线的一部分的第一接触孔。 第二图案化导电层包括数据线，源极，漏极和带状电容电极。 每个带状电容电极通过第一接触孔中的一个电连接到一条公共线。 在每个数据线和一个带状电容电极之间形成间隙，并且带状浮动屏蔽图案设置在数据线，间隙和带状电容电极之下。 每个像素电极通过其中一个第二接触孔电连接到一个漏极。

公开(公告)号：US20110128214A1

公开(公告)日：2011-06-02

申请号：US12720675

申请日：2010-03-10

申请人： Chou-Chin Wu ,  I-Chun Chen ,  Ming-Hung Shih ,  Chu-Yu Liu

发明人： Chou-Chin Wu ,  I-Chun Chen ,  Ming-Hung Shih ,  Chu-Yu Liu

IPC分类号： G09G3/36

CPC分类号： G02F1/136286 ,  G02F2201/121 ,  G02F2201/122

摘要： A display panel includes an array substrate, an opposite substrate and a display medium layer. A plurality of ring-like common lines of the array substrate are respectively located between two adjacent scan lines, and a plurality of date lines intersect with the scan lines and the ring-like common lines. Each pixel unit of the array substrate includes an active device, a pixel electrode and a connecting line. Each of the connecting line intersects with one of the scan lines and is electrically connected to the two adjacent ring-like common lines so as to connect the ring-like common lines to form a meshed common line. A transparent region is defined by a black matrix layer of the opposite substrate and the ring-like common lines. The black matrix layer does not cover the ring-like common lines at the corner of the transparent region near the connecting lines.

摘要翻译： 显示面板包括阵列基板，相对基板和显示介质层。 阵列基板的多个环状共同线分别位于两条相邻的扫描线之间，并且多条日期线与扫描线和环状公共线相交。 阵列基板的每个像素单元包括有源器件，像素电极和连接线。 每个连接线与扫描线之一相交，并且电连接到两个相邻的环形公共线，以便连接环状公共线以形成网状公共线。 透明区域由相对基板的黑矩阵层和环状公共线限定。 黑色矩阵层不覆盖连接线附近的透明区域的拐角处的环状共同线。

公开(公告)号：US20120056207A1

公开(公告)日：2012-03-08

申请号：US13077989

申请日：2011-04-01

申请人： Hui-Ting Hsu ,  Chu-Yu Liu ,  Yu-Chieh Kuo ,  I-Chun Chen ,  Jen-Wen Wan ,  Chou-Chin Wu

发明人： Hui-Ting Hsu ,  Chu-Yu Liu ,  Yu-Chieh Kuo ,  I-Chun Chen ,  Jen-Wen Wan ,  Chou-Chin Wu

IPC分类号： H01L27/15

CPC分类号： G02F1/136213 ,  G02F2001/136218 ,  H01L27/124

摘要： A pixel array includes pixel sets. Each pixel set includes a first and second scan lines arranged in parallel on a substrate, a data line not parallel to the first and second scan lines, a first active device electrically connecting the first scan line and the data line, a second active device electrically connecting the second scan line and the data line, a first pixel electrode electrically connecting the first active device, a second pixel electrode electrically connecting the second active device, and an auxiliary electrode pattern that includes a connecting portion and a first and second branch portions. A gap is between the first and second pixel electrodes. The connecting portion underneath the gap between the first and second pixel electrodes partially overlaps the first and second pixel electrodes. The first and second branch portions connect the connecting portion and partially overlap the first and second pixel electrodes, respectively.

摘要翻译： 像素阵列包括像素集。 每个像素组包括平行布置在衬底上的第一和第二扫描线，不平行于第一和第二扫描线的数据线，电连接第一扫描线和数据线的第一有源器件，电连接第一扫描线和数据线的第二有源器件 连接第二扫描线和数据线，电连接第一有源器件的第一像素电极，电连接第二有源器件的第二像素电极和包括连接部分和第一和第二分支部分的辅助电极图案。 在第一和第二像素电极之间存在间隙。 第一和第二像素电极之间的间隙下方的连接部分与第一和第二像素电极部分重叠。 第一和第二分支部分分别连接连接部分，并分别与第一和第二像素电极部分重叠。

公开(公告)号：US08643017B2

公开(公告)日：2014-02-04

申请号：US13570266

申请日：2012-08-09

申请人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

发明人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

IPC分类号： H01L31/00

CPC分类号： H01L27/12 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/136286 ,  H01L27/124

摘要： An active device array substrate including a first patterned conductive layer, a dielectric layer, a second patterned conductive layer, a passivation layer and pixel electrodes is provided. The first patterned conductive layer includes scan lines, common lines, gates and strip floating shielding patterns. The dielectric layer covering the first patterned conductive layer has first contact holes which expose a portion of the common lines, respectively. The second patterned conductive layer includes data lines, sources, drains and strip capacitance electrodes. Each strip capacitance electrode is electrically connected to one of the common lines through one of the first contact holes. A gap is formed between each data line and one strip capacitance electrode, and the strip floating shielding patterns are disposed under the data lines, the gap and the strip capacitance electrodes. Each pixel electrode is electrically connected to one of the drains through one of the second contact holes.

摘要翻译： 提供了包括第一图案化导电层，电介质层，第二图案化导电层，钝化层和像素电极的有源器件阵列衬底。 第一图案化导电层包括扫描线，公共线，栅极和条状浮动屏蔽图案。 覆盖第一图案化导电层的电介质层具有分别露出公共线的一部分的第一接触孔。 第二图案化导电层包括数据线，源极，漏极和带状电容电极。 每个带状电容电极通过第一接触孔中的一个电连接到一条公共线。 在每个数据线和一个带状电容电极之间形成间隙，并且带状浮动屏蔽图案设置在数据线，间隙和带状电容电极之下。 每个像素电极通过其中一个第二接触孔电连接到一个漏极。

公开(公告)号：US08576366B2

公开(公告)日：2013-11-05

申请号：US13077989

申请日：2011-04-01

申请人： Hui-Ting Hsu ,  Chu-Yu Liu ,  Yu-Chieh Kuo ,  I-Chun Chen ,  Jen-Wen Wan ,  Chou-Chin Wu

发明人： Hui-Ting Hsu ,  Chu-Yu Liu ,  Yu-Chieh Kuo ,  I-Chun Chen ,  Jen-Wen Wan ,  Chou-Chin Wu

IPC分类号： G02F1/1343

CPC分类号： G02F1/136213 ,  G02F2001/136218 ,  H01L27/124

摘要： A pixel array includes pixel sets. Each pixel set includes a first and second scan lines arranged in parallel on a substrate, a data line not parallel to the first and second scan lines, a first active device electrically connecting the first scan line and the data line, a second active device electrically connecting the second scan line and the data line, a first pixel electrode electrically connecting the first active device, a second pixel electrode electrically connecting the second active device, and an auxiliary electrode pattern that includes a connecting portion and a first and second branch portions. A gap is between the first and second pixel electrodes. The connecting portion underneath the gap between the first and second pixel electrodes partially overlaps the first and second pixel electrodes. The first and second branch portions connect the connecting portion and partially overlap the first and second pixel electrodes, respectively.

摘要翻译： 像素阵列包括像素集。 每个像素组包括平行布置在衬底上的第一和第二扫描线，不平行于第一和第二扫描线的数据线，电连接第一扫描线和数据线的第一有源器件，电连接第一扫描线和数据线的第二有源器件 连接第二扫描线和数据线，电连接第一有源器件的第一像素电极，电连接第二有源器件的第二像素电极和包括连接部分和第一和第二分支部分的辅助电极图案。 在第一和第二像素电极之间存在间隙。 第一和第二像素电极之间的间隙下方的连接部分与第一和第二像素电极部分重叠。 第一和第二分支部分分别连接连接部分，并分别与第一和第二像素电极部分重叠。

公开(公告)号：US20100327284A1

公开(公告)日：2010-12-30

申请号：US12559508

申请日：2009-09-15

申请人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

发明人： Chu-Yu Liu ,  Ming-Hung Shih ,  Chou-Chin Wu ,  I-Chun Chen

IPC分类号： H01L27/12

CPC分类号： H01L27/12 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/136286 ,  H01L27/124

摘要： An active device array substrate including a first patterned conductive layer, a dielectric layer, a second patterned conductive layer, a passivation layer and pixel electrodes is provided. The first patterned conductive layer includes scan lines, common lines, gates and strip floating shielding patterns. The dielectric layer covering the first patterned conductive layer has first contact holes which expose a portion of the common lines, respectively. The second patterned conductive layer includes data lines, sources, drains and strip capacitance electrodes. Each strip capacitance electrode is electrically connected to one of the common lines through one of the first contact holes. A gap is formed between each data line and one strip capacitance electrode, and the strip floating shielding patterns are disposed under the data lines, the gap and the strip capacitance electrodes. Each pixel electrode is electrically connected to one of the drains through one of the second contact holes.

摘要翻译： 提供了包括第一图案化导电层，电介质层，第二图案化导电层，钝化层和像素电极的有源器件阵列衬底。 第一图案化导电层包括扫描线，公共线，栅极和条状浮动屏蔽图案。 覆盖第一图案化导电层的电介质层具有分别露出公共线的一部分的第一接触孔。 第二图案化导电层包括数据线，源极，漏极和带状电容电极。 每个带状电容电极通过第一接触孔中的一个电连接到一条公共线。 在每个数据线和一个带状电容电极之间形成间隙，并且带状浮动屏蔽图案设置在数据线，间隙和带状电容电极之下。 每个像素电极通过其中一个第二接触孔电连接到一个漏极。