POWER MANAGEMENT METHOD FOR CONTROLLING COMMUNICATION INTERFACE TO ENTER/LEAVE POWER-SAVING MODE AND RELATED DEVICE THEREOF
    2.
    发明申请
    POWER MANAGEMENT METHOD FOR CONTROLLING COMMUNICATION INTERFACE TO ENTER/LEAVE POWER-SAVING MODE AND RELATED DEVICE THEREOF 有权
    用于控制通信接口进入/断开节电模式的电源管理方法及其相关设备

    公开(公告)号:US20120089851A1

    公开(公告)日:2012-04-12

    申请号:US13080687

    申请日:2011-04-06

    Abstract: One power management method of a communication interface includes: when receiving a command transmitted via the communication interface, checking if a predetermined criterion is met; and when the predetermined criterion is met, controlling the communication interface to enter a power-saving mode before an end of the received command. Another power management method of a communication interface includes: when the communication interface is operated under a power-saving mode, checking if a predetermined criterion of an executed command is met; and when the predetermined criterion is met, controlling the communication interface to leave the power-saving mode.

    Abstract translation: 通信接口的一种电源管理方法包括:当接收到经由通信接口发送的命令时,检查是否满足预定标准; 并且当满足预定标准时,在所接收的命令结束之前控制通信接口进入省电模式。 通信接口的另一种电源管理方法包括:当通信接口在省电模式下操作时,检查是否满足执行命令的预定标准; 并且当满足预定标准时,控制通信接口以离开省电模式。

    Detecting circuit and related detecting method
    3.
    发明授权
    Detecting circuit and related detecting method 有权
    检测电路及相关检测方法

    公开(公告)号:US08537937B2

    公开(公告)日:2013-09-17

    申请号:US12987146

    申请日:2011-01-09

    CPC classification number: H04B1/16 H03K5/19

    Abstract: A detecting circuit includes: a first offset generating circuit arranged to apply a first offset to an input signal pair comprising a positive input signal and a negative input signal and accordingly generate a first output signal pair comprising a first positive output signal and a first negative output signal; and a first sampling circuit coupled to the first offset generating circuit, the first sampling circuit arranged to sample a difference in voltage between the first positive output signal and the first negative output signal to generate a first sampling signal, wherein the first sampling signal is utilized to identify a data signal on the input signal pair.

    Abstract translation: 检测电路包括:第一偏移生成电路,被布置为向包括正输入信号和负输入信号的输入信号对施加第一偏移,并且因此产生包括第一正输出信号和第一负输出的第一输出信号对 信号; 以及耦合到所述第一偏移生成电路的第一采样电路,所述第一采样电路被布置成对所述第一正输出信号和所述第一负输出信号之间的电压差进行采样,以产生第一采样信号,其中利用所述第一采样信号 以识别输入信号对上的数据信号。

    DETECTING CIRCUIT AND RELATED DETECTING METHOD
    4.
    发明申请
    DETECTING CIRCUIT AND RELATED DETECTING METHOD 有权
    检测电路及相关检测方法

    公开(公告)号:US20120177146A1

    公开(公告)日:2012-07-12

    申请号:US12987146

    申请日:2011-01-09

    CPC classification number: H04B1/16 H03K5/19

    Abstract: A detecting circuit includes: a first offset generating circuit arranged to apply a first offset to an input signal pair comprising a positive input signal and a negative input signal and accordingly generate a first output signal pair comprising a first positive output signal and a first negative output signal; and a first sampling circuit coupled to the first offset generating circuit, the first sampling circuit arranged to sample a difference in voltage between the first positive output signal and the first negative output signal to generate a first sampling signal, wherein the first sampling signal is utilized to identify a data signal on the input signal pair.

    Abstract translation: 检测电路包括:第一偏移生成电路,被布置为向包括正输入信号和负输入信号的输入信号对施加第一偏移,并且因此产生包括第一正输出信号和第一负输出的第一输出信号对 信号; 以及耦合到所述第一偏移生成电路的第一采样电路,所述第一采样电路被布置成对所述第一正输出信号和所述第一负输出信号之间的电压差进行采样,以产生第一采样信号,其中利用所述第一采样信号 以识别输入信号对上的数据信号。

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