知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

8 records (took 0.014 seconds)

    Digital motor speed controller
    1.
    发明授权
    Digital motor speed controller 失效
    数字电机转速控制器

    公开(公告)号：US4415844A

    公开(公告)日：1983-11-15

    申请号：US230448

    申请日：1981-02-09

    Applicant: Charles E. Mendenhall ,  Michael D. Buckert

    Inventor： Charles E. Mendenhall ,  Michael D. Buckert

    IPC: H02P6/06 ,  H02P5/06

    CPC classification number: H02P6/06 ,  Y10S388/903 ,  Y10S388/904 ,  Y10S388/912

    Abstract: Control apparatus for a polyphase, brushless dc electric motor includes a programmed microprocessor which responds to signals indicative of rotor position and rotational speed to selectively energize the windings of the motor and effect a desired speed. The apparatus is compact, readily fabricated, and more reliable than hardwired control circuitry.

    Abstract translation: 用于多相无刷直流电动机的控制装置包括编程的微处理器，其响应于指示转子位置和转速的信号，以选择性地激励电动机的绕组并且实现期望的速度。 该设备紧凑，易于制造，并且比硬连线控制电路更可靠。

    Adaptive circuit for extracting timing information from a repetitive series of time coherent pulses
    2.
    发明授权
    Adaptive circuit for extracting timing information from a repetitive series of time coherent pulses 失效
    用于从重复的时间相干脉冲串中提取定时信息的自适应电路

    公开(公告)号：US4189784A

    公开(公告)日：1980-02-19

    申请号：US972316

    申请日：1978-12-22

    Applicant: Charles E. Mendenhall

    Inventor： Charles E. Mendenhall

    IPC: G11B5/596 ,  G11C11/40

    CPC classification number: G11B5/596

    Abstract: A circuit for discriminating among pulses in a series of recurring pulses based on the interval between adjacent pulses which circuit is particularly useful in extracting timing information from a series of pulses such as are induced in a servo head by movement relative thereto of a prerecorded servo track in a disc pack data storage system. The circuit includes a monostable multivibrator for producing a timing signal having a duration corresponding to the time interval between two successive pulses. The monostable multivibrator output is stored, for example in a data flip flop, so as to produce an output pulse from the flip flop if a succeeding pulse in the series occurs while the monostable multivibrator output is high. A feedback circuit connects the output pulse to the timing circuit of the monostable multivibrator to alter the duration of the timing signal produced by the monostable multivibrator in accordance with changes in frequency of the recurring pulses so as to maintain constant the width of the output pulse notwithstanding variation of the frequency of the pulse series. The feedback circuit includes an integrator which effects a reduction in band width of the feedback circuit so that noise pulses or the like that occur at random times have insignificant effect on the circuit and on the output pulses produced thereby.

    Abstract translation: 一种用于基于相邻脉冲之间的间隔来区分一系列循环脉冲中的脉冲之间的电路，该电路特别可用于从一系列脉冲中提取定时信息，例如通过相对于其预先记录的伺服磁道相对于伺服磁头而在伺服磁头中感应的脉冲 在盘片数据存储系统中。 该电路包括用于产生具有对应于两个连续脉冲之间的时间间隔的持续时间的定时信号的单稳态多谐振荡器。 单稳态多谐振荡器输出被存储在例如数据触发器中，以便在单稳态多谐振荡器输出为高电平时发生串联中的后续脉冲，从触发器产生输出脉冲。 反馈电路将输出脉冲连接到单稳态多谐振荡器的定时电路，以根据重复脉冲频率的变化改变由单稳态多谐振荡器产生的定时信号的持续时间，从而保持输出脉冲的宽度恒定，尽管如此 脉冲序列频率的变化。 反馈电路包括积分器，其实现反馈电路的带宽减小，使得随机发生的噪声脉冲等对电路和由此产生的输出脉冲具有不显着的影响。

    Phase comparator with dual phase detectors
    3.
    发明授权
    Phase comparator with dual phase detectors 失效
    双相检测器相位比较器

    公开(公告)号：US4200845A

    公开(公告)日：1980-04-29

    申请号：US972571

    申请日：1978-12-22

    Applicant: Charles E. Mendenhall ,  Randall L. Sandusky

    Inventor： Charles E. Mendenhall ,  Randall L. Sandusky

    IPC: G11B20/14 ,  H03D13/00 ,  H03L7/10 ,  H03B3/04 ,  H03K1/17 ,  H03K5/20

    CPC classification number: G11B20/1403 ,  G11B20/1423 ,  H03D13/004 ,  H03L7/10

    Abstract: A phase comparator for a digital phase locked loop which provides first and second order error signals for phase and frequency correction of a voltage controlled oscillator in the loop with respect to data being read for self synchronization of the data. A first order error signal is generated in a first phase detector which operates only during a VCO "unsafe" condition, i.e., when a data pulse is beyond a present limit. A finer, second order error signal is generated in a second phase detector which operates only during a VCO "safe" condition, i.e., when a data pulse is within a preset limit.

    Abstract translation: 一种用于数字锁相环的相位比较器，用于提供第一和第二阶误差信号，用于相对于要读取数据的自身同步的循环中的压控振荡器进行相位和频率校正。 在第一相位检测器中产生一阶误差信号，该第一相位检测器仅在VCO“不安全”条件下操作，即当数据脉冲超出当前限制时。 在仅在VCO“安全”状态下操作的第二相位检测器中产生更精细的二阶误差信号，即当数据脉冲在预设极限内时。

    Autonomous fault diagnosis for disk drive using an internal microprocessor
    5.
    发明授权
    Autonomous fault diagnosis for disk drive using an internal microprocessor 失效
    使用内部微处理器进行磁盘驱动器的自动故障诊断

    公开(公告)号：US4268905A

    公开(公告)日：1981-05-19

    申请号：US969604

    申请日：1978-12-14

    Applicant: Donald F. Johann ,  Charles E. Mendenhall

    Inventor： Donald F. Johann ,  Charles E. Mendenhall

    IPC: G06F11/22 ,  G11B19/04 ,  G11B20/18 ,  G06F11/00 ,  G06F13/04

    CPC classification number: G11B19/04 ,  G06F11/22 ,  G11B20/1816

    Abstract: A disk drive control system incorporating an internal microprocessor and internal testing capabilities. The disk drive control system is capable of simulating drive operation without carriage motion so as to test substantially all functional subsystems of the disk drive. The test technique comprises the exercising of subsystems and a diagnosis of operations according to a hierarchy of interdependence of subsystem operation.

    Abstract translation: 包含内部微处理器和内部测试功能的磁盘驱动器控制系统。 磁盘驱动器控制系统能够模拟没有滑架运动的驱动操作，以便基本上测试磁盘驱动器的所有功能子系统。 测试技术包括根据子系统操作的相互依赖性层次来运行子系统和操作诊断。

    Drive power sequencing
    7.
    发明授权
    Drive power sequencing 失效
    驱动电源排序

    公开(公告)号：US4233666A

    公开(公告)日：1980-11-11

    申请号：US952767

    申请日：1978-10-19

    Applicant: Per-Erik Walberg ,  Donald F. Johann ,  Charles E. Mendenhall

    Inventor： Per-Erik Walberg ,  Donald F. Johann ,  Charles E. Mendenhall

    IPC: G05F1/577 ,  G06F1/00

    CPC classification number: G05F1/577

    Abstract: In a digital information storage system or the like, start up power sequencing for independently operable machines such as disk drives each equipped with a microprocessing unit is provided through a simplified power sequencing circuit. The power sequencing circuit is operatively coupled with an independent preprogrammable micropocessing unit in each machine and to a single control line common to all disk drives. The microprocessing unit is preprogrammed to interact with the power sequencing circuit to provide Enable/Disable signals to the control line and to sense the state of the control line. In particular, the microprocessing unit executes a preprogrammed sequence of steps in interaction with the control line to sequence the start-up of each spindle motor irrespective of the number of disk drives coupled to the control line, thereby preventing electrical power overload.

    Abstract translation: 在数字信息存储系统等中，通过简化的功率排序电路来提供启动用于独立可操作的机器的功率排序，例如各自配备有微处理单元的磁盘驱动器。 电源排序电路与每个机器中的独立的可预编程微处理单元可操作地耦合到所有磁盘驱动器通用的单个控制线。 微处理单元被预编程以与电源排序电路交互以向控制线提供启用/禁用信号并感测控制线的状态。 特别地，微处理单元执行与控制线相互作用的预编程步骤序列，以对每个主轴电动机的起动进行排序，而不管耦合到控制线的盘驱动器的数量如何，从而防止电力过载。

Patent Agency Ranking