Wirelessly chargeable portable power bank

    公开(公告)号:US11381112B2

    公开(公告)日:2022-07-05

    申请号:US16933784

    申请日:2020-07-20

    Abstract: A power bank includes, in part, a rechargeable battery, a wireless power recovery unit adapted to receive power wirelessly, a battery charging circuit adapted to deliver the power recovered by the power recovery unit to the rechargeable battery, an output interface, and a voltage reconditioning circuit adapted to supply power from the rechargeable battery to the output interface for delivery to an external device. The wireless power recovery unit may include one or more of a multitude of photodiodes adapted to convert a coherent optical signal to electrical power, an acoustic transducer adapted to convert acoustic waves to an electrical power, an inductive coupling circuit adapted to convert time varying magnetic flux to electrical power, and an RF power recovery unit adapted to convert an RF signal to electrical power.

    Active CMOS recovery units for wireless power transmission

    公开(公告)号:US10673351B2

    公开(公告)日:2020-06-02

    申请号:US16004198

    申请日:2018-06-08

    Abstract: A rectifying circuit includes, in part, first and second NMOS transistors, an impedance matching network, and an RF block circuit. The source and gate terminals of the first NMOS transistor respectively receive the ground potential and a biasing voltage. The second NMOS transistor has a gate terminal coupled to the drain terminal of the first NMOS transistor, a drain terminal coupled to the gate terminal of the first NMOS transistor, and a source terminal receiving the ground potential. The impedance matching network is disposed between the antenna and the drain terminals of the first and second NMOS transistors. The RF block circuit is coupled between the drain terminals of the first and second NMOS transistors and the output terminal of the rectifying circuit. The RF block circuit is adapted to prevent the RF signal from flowing into the output terminal of the rectifying circuit.

    Self-calibrating phased-array transceiver

    公开(公告)号:US12136772B2

    公开(公告)日:2024-11-05

    申请号:US17683100

    申请日:2022-02-28

    Abstract: A phased-array includes, in part, N transceivers each including a receiver and a transmitter, and a controller. The phased array is configured to transmit a first radio signal from a first element of the array during a first time period, receive the first radio signal from a second element of the array, recover a first value associated with the radio signal received by the second element, transmit a second radio signal from the second element of the array during a second time period, receive the second radio signal from the first element of the array, recover a second value associated with the radio signal received by the first element, and determine a first phase of a reference signal received by the second element from the recovered first and second values. The first phase is relative to a second phase of the reference signal received by the first element.

    Self-calibrating phased-array transceiver

    公开(公告)号:US11264715B2

    公开(公告)日:2022-03-01

    申请号:US15997617

    申请日:2018-06-04

    Abstract: A phased-array includes, in part, N transceivers each including a receiver and a transmitter, and a controller. The phased array is configured to transmit a first radio signal from a first element of the array during a first time period, receive the first radio signal from a second element of the array, recover a first value associated with the radio signal received by the second element, transmit a second radio signal from the second element of the array during a second time period, receive the second radio signal from the first element of the array, recover a second value associated with the radio signal received by the first element, and determine a first phase of a reference signal received by the second element from the recovered first and second values. The first phase is relative to a second phase of the reference signal received by the first element.

    Highly efficient multi-port radiataor

    公开(公告)号:US10720715B2

    公开(公告)日:2020-07-21

    申请号:US15897054

    申请日:2018-02-14

    Abstract: A radiator is formed by forming a multitude of slot antennas adjacent one another such that the spacing between each pair of adjacent slot antennas is smaller than the wavelength of the signal being transmitted or received by the radiator. The radiator achieves high efficiency by reducing the excitation of substrate modes, and further achieves high output power radiation by combining power of multiple CMOS power amplifiers integrated in the radiator structure. Impedance matching to low-voltage CMOS power amplifiers is achieved through lowering the impedance at the radiator ports. Each output power stage may be implemented as a combination of several smaller output power stages operating in parallel, thereby allowing the combination to utilize an effective output device size commensurate with the impedance of the radiator.

    Method and Apparatus for Reducing Surface Waves in Printed Antennas

    公开(公告)号:US20190198987A1

    公开(公告)日:2019-06-27

    申请号:US16140421

    申请日:2018-09-24

    CPC classification number: H01Q1/38 H01Q9/0407 H01Q9/065

    Abstract: An antenna, includes in part, a metal piece formed on a surface of a substrate and configure to radiate electromagnetic waves, a metal feed formed in the substrate and configure to supply electrical signal to the metal piece, and a multitude of metallic walls formed in the substrate and enclosing the metal piece. The antenna may be a patch antenna, a monopole antenna, or a dipole antenna. Each metallic wall may include a via that is fully or partially filled by a metal, or an electroplated tub formed in the substrate. The antenna further includes, in part, a metallic trace formed on the surface of the substrate and enclosing the antenna. The substrate may be a printed circuit board.

    ACTIVE CMOS RECOVERY UNITS FOR WIRELESS POWER TRANSMISSION

    公开(公告)号:US20190173389A1

    公开(公告)日:2019-06-06

    申请号:US16004198

    申请日:2018-06-08

    Abstract: A rectifying circuit includes, in part, first and second NMOS transistors, an impedance matching network, and an RF block circuit. The source and gate terminals of the first NMOS transistor respectively receive the ground potential and a biasing voltage. The second NMOS transistor has a gate terminal coupled to the drain terminal of the first NMOS transistor, a drain terminal coupled to the gate terminal of the first NMOS transistor, and a source terminal receiving the ground potential. The impedance matching network is disposed between the antenna and the drain terminals of the first and second NMOS transistors. The RF block circuit is coupled between the drain terminals of the first and second NMOS transistors and the output terminal of the rectifying circuit. The RF block circuit is adapted to prevent the RF signal from flowing into the output terminal of the rectifying circuit.

    RF receiver
    10.
    发明授权

    公开(公告)号:US11616520B2

    公开(公告)日:2023-03-28

    申请号:US15273633

    申请日:2016-09-22

    Abstract: A device includes, in part, an antenna adapted to receive an RF signal that includes modulated data, a splitter/coupler adapted to split the received RF signal, a receiver adapted to demodulate the data from a first portion of the RF signal, and a power recovery unit adapted to convert to a DC power a second portion of the RF signal. The splitter/coupler is optionally adjustable to split the RF signal in accordance with a value that may be representative of a number of factors, such as the target data rate, the DC power requirement of the device, and the like. The device optionally includes a switch and/or a power combiner adapted to deliver all the received RF power to the receiver depending on any number of operation conditions of the device or the device's distance from an RF transmitting device.

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