公开(公告)号：US20140317462A1

公开(公告)日：2014-10-23

申请号：US13899486

申请日：2013-05-21

Applicant: Broadcom Corporation

Inventor： David Money HARRIS ,  Paul Ivan PENZES

IPC: G01R31/3185

CPC classification number: G01R31/318541 ,  G01R31/31726 ,  G01R31/318536 ,  G01R31/318552 ,  G01R31/318555 ,  G01R31/318594

Abstract: A scannable sequential element is provided. The scannable sequential element includes a master stage that includes a data path configured to receive a data input. The master stage also includes a pass gate located on the data path and configured to selectively pass the data input, in which the data path has only one pass gate. The master stage also includes a test path coupled to the data path and configured to receive a test input. The master stage also includes pass gates located on the test path and configured to selectively pass the test input.

Abstract translation: 提供可扫描的顺序元件。 可扫描顺序元件包括主级，其包括被配置为接收数据输入的数据路径。 主站还包括位于数据路径上的传递门，并被配置为选择性地传递其中数据路径仅具有一个传递门的数据输入。 主站台还包括耦合到数据路径并被配置为接收测试输入的测试路径。 主站台还包括位于测试路径上的通过门，并配置为选择性地通过测试输入。

公开(公告)号：US20150147987A1

公开(公告)日：2015-05-28

申请号：US14163783

申请日：2014-01-24

Applicant: Broadcom Corporation

Inventor： David Money HARRIS ,  David GARRETT ,  Bob LORENZ

IPC: H04B1/04

CPC classification number: H04B1/0007

Abstract: The present disclosure is directed to a system and method for performing digital up-conversion of a signal to a desired RF carrier frequency. The system and method efficiently perform digital up-conversion of the signal, in one example, by controlling a sample clock that is used by a DAC to sample and convert the up-converted signal from the digital domain to the analog domain to have a frequency that is four or eight times the desired RF carrier frequency. By controlling the sample clock of the DAC to have a frequency that is four or eight times the desired RF carrier frequency, the system and method can be implemented using currently available IC process geometries such that the implementation consumes much less area and/or power than an analog up-converter configured to have equivalent up-conversion functionality.

Abstract translation: 本公开涉及一种用于将信号数字上变频到期望的RF载波频率的系统和方法。 该系统和方法在一个示例中有效地执行信号的数字上转换，通过控制由DAC使用的采样时钟来采样并将上转换后的信号从数字域转换为模拟域，以具有频率 即所需RF载波频率的四到八倍。 通过控制DAC的采样时钟具有所需RF载波频率的四或八倍的频率，可以使用当前可用的IC工艺几何来实现系统和方法，使得实现消耗的面积和/或功率比 配置为具有等效的上变频功能的模拟上变频器。