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公开(公告)号：US11971627B2
公开(公告)日：2024-04-30
申请号：US17629416
申请日：2021-04-26
Inventor： Feifei Wang , Hongming Zhan , Xibin Shao , Lintao Ji
IPC: G02F1/13363 , G02F1/1335 , G02F1/1337 , G02F1/1362
CPC classification number: G02F1/133637 , G02F1/133633 , G02F1/133738 , G02F1/133514 , G02F1/1362 , G02F2413/02 , G02F2413/08 , G02F2413/13
Abstract: Provided are a display panel and a method for preparing same, and a display apparatus. The display panel includes an array substrate and an opposite substrate, which are oppositely arranged, and a liquid crystal layer, which is arranged between the array substrate and the opposite substrate, wherein a compensation layer is arranged on the array substrate or the opposite substrate, and an included angle between an optical axis direction of the compensation layer and an initial optical axis direction of liquid crystal molecules in the liquid crystal layer is less than or equal to 10 degrees; dispersion characteristics of the liquid crystal layer and the compensation layer are the opposite of each other.
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公开(公告)号：US11846848B2
公开(公告)日：2023-12-19
申请号：US17658655
申请日：2022-04-10
Inventor： Xibin Shao , Dongchuan Chen , Yanping Liao
IPC: G02F1/13357 , G02F1/1335 , F21V8/00
CPC classification number: G02F1/133606 , G02B6/0051 , G02B6/0055 , G02B6/0088 , G02F1/133514 , G02F1/133603 , G02F1/133607 , G02F1/133614
Abstract: A display apparatus includes: a display panel; a backlight assembly including a light source; and an optical film group including: a functional material layer; wherein: the light source is configured to emit a white light; and the functional material layer is configured to absorb light in at least one of a range of 480 nm-520 nm or a range of 575 nm-600 nm to thereby reshape the white light to have blue, red, and green peaks; and the display apparatus further includes a polarizer (POL) including one or more polarizer sub-layers, wherein the functional material layer and one of the one or more polarizer sub-layers are configured as one same layer.
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公开(公告)号：US11783744B2
公开(公告)日：2023-10-10
申请号：US17445810
申请日：2021-08-24
Inventor： Qiujie Su , Zhihua Sun , Yingmeng Miao , Yinlong Zhang , Feng Qu , Seungmin Lee , Yanping Liao , Xibin Shao
CPC classification number: G09G3/20 , G11C19/28 , G09G2300/0408 , G09G2310/0286 , G09G2310/08
Abstract: A gate driving circuit, a method for driving the gate driving circuit, and a display panel. The gate driving circuit includes N-stages of cascaded shift registers divided into at least one group of K-stages in which a clock signal terminal of a k-th stage of shift register is connected to receive a k-th clock signal, where N, k and K are positive integers, and 1≤k≤K≤N; and an input signal terminal of a n-th stage of shift register is connected to an output signal terminal of a (n−i)-th stage of shift register, and reset signal terminals of the n-th and (n+1)-th stages of shift registers are connected to an output signal terminal of a (n+j)-th stage of shift register, wherein the n is one of an odd number and an even number, where i and j are positive integers, 1
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公开(公告)号：US20230196961A1
公开(公告)日：2023-06-22
申请号：US18082691
申请日：2022-12-16
Inventor： Yingmeng Miao , Changcheng Liu , Zhihua Sun , Yangping Liao , Seungmin Lee , Xibin Shao , Cong Wang , Feng Qu
CPC classification number: G09G3/20 , G11C19/28 , G09G2310/0267 , G09G2300/0408 , G09G2310/08 , G09G2300/08 , G09G2310/0243 , G09G2310/0286
Abstract: There is provided a gate driving circuit comprising N first shift registers arranged alternately with N second shift registers. An input signal terminal of an n-th stage of first shift register is coupled to an output signal terminal of an (n−i)-th stage of first shift register, and a reset signal terminal of the n-th stage of first shift register is coupled to an output signal terminal of an (n+j)-th stage of first shift register. Input signal terminal and reset signal terminal of n-th stage of second shift register are coupled to output signal terminals of (n−i)-th and (n+j)-th stages of second shift registers respectively. K=6, i=3, and j=4. Reset signal terminals of (N−j+1)-th to N-th stages of first shift registers and reset signal terminals of (N−j+1)-th to N-th stages of second shift registers are configured to receive a total reset signal.
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公开(公告)号：US20230147432A1
公开(公告)日：2023-05-11
申请号：US16977402
申请日：2019-11-15
Inventor： Feifei Wang , Xibin Shao , Hongming Zhan , Lintao Ji , Xiaochun Xu
IPC: G02F1/13363 , G02F1/1335 , G02F1/1343 , G02F1/1337 , G02F1/1334 , G02F1/13357
CPC classification number: G02F1/13363 , G02F1/1337 , G02F1/13345 , G02F1/133528 , G02F1/133602 , G02F1/134309
Abstract: A display apparatus includes an array substrate; a counter substrate facing the array substrate; a liquid crystal layer between the array substrate and the counter substrate; at least one optical compensation film between the array substrate and the counter substrate, extending throughout a display area of the display apparatus; a control electrode between the array substrate and the counter substrate, extending throughout the display area of the display apparatus; and a back light configured to provide light for image display. The liquid crystal layer in a dark state has a first phase retardation. Under control of the control electrode, the at least one optical compensation film gives a second phase retardation when the liquid crystal layer is in the dark state. A sum of the first phase retardation and the second phase retardation is substantially same as an integral multiple of a wavelength of light emitted from the back light.
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Patent Agency Ranking
公开(公告)号：US11636793B2
公开(公告)日：2023-04-25
申请号：US17341756
申请日：2021-06-08
Inventor： Zhihua Sun , Yinlong Zhang , Qiujie Su , Feng Qu , Jing Liu , Yanping Liao , Xibin Shao
IPC: G09G3/20
Abstract: Embodiments of the present disclosure provide a method of driving display, and a display device. The method of driving display includes: scanning, progressively or rows by rows, a plurality of sub-pixels arranged in an N×M array, to turn on each row of sub-pixels scanned, so that a duration in which two adjacent rows of sub-pixels are simultaneously in an ON state is greater than or equal to two times a unit scanning time, wherein the unit scanning time is a time required for scanning a row of sub-pixels, N is an integer greater than 1, and M is an integer greater than 1; and applying data signals to at least two rows of sub-pixels simultaneously in the ON state, so that a duration of applying the data signals to each row of sub-pixels is greater than the unit scanning time.
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公开(公告)号：US11585812B2
公开(公告)日：2023-02-21
申请号：US16086322
申请日：2018-02-07
Inventor： Fengchun Pang , Chuncheng Che , Hailin Xue , Xibin Shao , Peizhi Cai
IPC: G01N33/569 , G01N21/64
Abstract: There is provided an influenza virus detection chip and a method for detecting influenza virus therewith. An influenza virus detection chip including: a graphene oxide film; a first pad disposed on one side of the graphene oxide film in a first direction; and a first electrode and a second electrode, connected to both ends of the graphene oxide film in a second direction perpendicular to the first direction, wherein a first monoclonal antibody with a fluorescent label is included in the first pad, and a second monoclonal antibody is included in the graphene oxide film, and wherein the fluorescent label includes a C═C—C═C conjugated double bond.
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公开(公告)号：US11320678B2
公开(公告)日：2022-05-03
申请号：US16329506
申请日：2018-07-24
Inventor： Ying Wang , Tien Lun Ting , Xue Cao , Chuncheng Che , Hailin Xue , Xibin Shao , Peizhi Cai
IPC: G02F1/13 , G02F1/1337 , G01L1/24 , G01L11/02 , G02F1/137
Abstract: A pressure sensor and a pressure detecting method are provided, the pressure sensor includes a liquid crystal cell including a cholesteric liquid crystal layer, a liquid crystal state detector module and a pressure finder module, and the liquid crystal cell includes a pressure receiving surface. The liquid crystal state detector module is configured to detect a liquid crystal arrangement state in the cholesteric liquid crystal layer in a situation where a pressure is applied on the pressure receiving surface of the liquid crystal cell; the pressure finder module is configured to find a value of the pressure corresponding to the liquid crystal arrangement state from a pre-stored correspondence table.
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公开(公告)号：US20220101770A1
公开(公告)日：2022-03-31
申请号：US17445810
申请日：2021-08-24
Inventor： Qiujie Su , Zhihua Sun , Yingmeng Miao , Yinlong Zhang , Feng Qu , Seungmin Lee , Yanping Liao , Xibin Shao
Abstract: A gate driving circuit, a method for driving the gate driving circuit, and a display panel. The gate driving circuit includes N-stages of cascaded shift registers divided into at least one group of K-stages in which a clock signal terminal of a k-th stage of shift register is connected to receive a k-th clock signal, where N, k and K are positive integers, and 1≤k≤K≤N; and an input signal terminal of a n-th stage of shift register is connected to an output signal terminal of a (n−i)-th stage of shift register, and reset signal terminals of the n-th and (n+1)-th stages of shift registers are connected to an output signal terminal of a (n+j)-th stage of shift register, wherein the n is one of an odd number and an even number, where i and j are positive integers, 1
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公开(公告)号：US20220101769A1
公开(公告)日：2022-03-31
申请号：US17351638
申请日：2021-06-18
Inventor： Yingmeng Miao , Zhihua Sun , Yanping Liao , Seungmin Lee , Xibin Shao , Cong Wang , Feng Qu
Abstract: According to the embodiments of the present disclosure, there is provided gate driving circuit comprising 2N stages of shift registers, the 2N stages of shift registers comprising N first shift registers arranged alternately with N second shift registers, wherein the N first shift registers are cascaded-coupled as N stages of first shift registers, and are configured to generate N first output signals under control of K first clock signals; and wherein the N second shift registers are cascaded-coupled as N stages of second shift registers, and are configured to generate N second output signals under a control of K second clock signals, wherein K and N are both integers greater than 1, and K≤N.
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