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公开(公告)号：US11837164B2
公开(公告)日：2023-12-05
申请号：US16966280
申请日：2019-09-17
Inventor： Lixin Zhu , Hongli Yue , Chunyang Nie , Shenghua Hu , Ke Dai
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/0426 , G09G2300/0852 , G09G2310/0291 , G09G2310/0294
Abstract: A drive control circuit is disclosed, and the drive control circuit is connected in series between a driving circuit and a first voltage terminal and forms a loop together. The drive control circuit comprises a current adjustment circuit and a control circuit. The current adjustment circuit controls a current in the loop according to a voltage signal difference between a voltage signal of a second node and a voltage signal of a first node. The control circuit controls the voltage signal of the second node according to the voltage signal of the first node, so that the current adjustment circuit controls the current in the loop during a start-up phase of the driving circuit.
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公开(公告)号：US11386691B2
公开(公告)日：2022-07-12
申请号：US16605983
申请日：2019-02-13
Applicant: BOE Technology Group Co., Ltd.
Inventor： Jian Gao , Xiaochuan Chen , Wei Wang , Hongli Yue , Wenji Zhu , Xiandong Meng , Xianqin Meng
Abstract: The present disclosure provides an optical device, a module, an apparatus and a system for fingerprint identification. The optical device includes: a first lens array including a plurality of first lenses; a second lens array opposite to the first lens array, including a plurality of second lenses; and a light shielding element between the first lens array and the second lens array, the light shielding element including a plurality of light-transmitting apertures. Image focal planes of the plurality of second lenses, object focal planes of the plurality of first lenses, and the light shielding element are coplanar. The plurality of first lenses are in one-to-one correspondence with the plurality of second lenses and the plurality of light-transmitting apertures, respectively.
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公开(公告)号：US12027134B2
公开(公告)日：2024-07-02
申请号：US17768828
申请日：2021-04-20
Inventor： Shou Li , Xingliang Li , Liugang Zhou , Jian Zhang , Zhanchang Bu , Hui Zhang , Hongli Yue
IPC: G09G3/36 , G02F1/1335 , G02F1/1362
CPC classification number: G09G3/3696 , G02F1/133512 , G02F1/133514 , G02F1/136286
Abstract: A display panel (20), a display device and a debugging method thereof are provided. The display panel (20) includes: a base substrate (1), including a display region (A) and a non-display region (B) surrounding the display region (A), the non-display region (B) including a binding region (C) located on one side of the display region (A); and a plurality of sub-pixels (2), located in the display region (A). Areas of pixel aperture regions of the plurality of sub-pixels (2) tend to increase in a direction from the binding region (C) to the display region (A).
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公开(公告)号：US11893919B2
公开(公告)日：2024-02-06
申请号：US17765373
申请日：2021-06-10
Inventor： Qiujie Su , Feng Qu , Zhihua Sun , Seungmin Lee , Yanping Liao , Hongli Yue
CPC classification number: G09G3/20 , G11C19/28 , G09G2300/0408 , G09G2310/0267 , G09G2310/0286 , G09G2310/061 , G09G2330/021
Abstract: A gate driving circuit and a display panel are provided. The gate driving circuit includes M shift registers and N clock signal lines; every N adjacent shift registers among the M shift registers are respectively connected to the N clock signal lines, where N is an even number greater than or equal to 4, and M is an integer greater than or equal to N; a signal output terminal (OUTPUT) of an ith shift register is connected to a signal input terminal (INPUT) of a (i+p)th shift register, where (N−4)/2≤p≤N/2, and i is taken from 1 to (M−p); and a pull-up reset signal terminal of a jth shift register is connected to a signal output terminal (OUTPUT) of a (j+q)th shift register, where 1
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