公开(公告)号：US20240306427A1

公开(公告)日：2024-09-12

申请号：US18025382

申请日：2022-06-29

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ying CUI ,  Hongli WANG ,  Danyang MA ,  Tong WU

IPC: H10K59/122 ,  H10K59/35 ,  H10K59/80 ,  H10K102/00

CPC classification number: H10K59/122 ,  H10K59/352 ,  H10K59/80515 ,  H10K2102/351

Abstract: Provided are an array substrate and a manufacturing method thereof, and a display device. The pixel defining layer include first sub-pixel opening columns and second sub-pixel opening columns that are alternately arranged; the first sub-pixel opening column includes at least two types of sub-pixel openings having different illumination colors, and the second sub-pixel opening column includes sub-pixel openings having the same illumination color; an area of the sub-pixel opening in the second sub-pixel opening column is greater than that of the sub-pixel opening in the first sub-pixel column; the pixel defining layer between the first sub-pixel opening column and the second sub-pixel opening column is made of a lyophobic material; the pixel defining layer between adjacent sub-pixel openings in the second sub-pixel opening column is made of a lyophilic material; and in the first sub-pixel opening column, the pixel defining layer between adjacent sub-pixel openings having the same illumination color is made of a lyophilic material, and the pixel defining layer between adjacent sub-pixel openings having different illumination colors is made of a material that is switched between a lyophilic property and a lyophobic property as an external condition changes.

公开(公告)号：US20250148998A1

公开(公告)日：2025-05-08

申请号：US19017835

申请日：2025-01-13

Applicant: BOE Technology Group Co., Ltd.

Inventor： Pan XU ,  Hongli WANG ,  Danyang MA ,  Guoying WANG ,  Xing ZHANG ,  Chengyuan LUO ,  Ying HAN

IPC: G09G3/3266 ,  H10K59/131

Abstract: A display substrate includes an underlayer substrate and a circuit structure layer. The circuit structure layer is located in a display area of the underlayer substrate. The circuit structure layer includes at least one first circuit area and at least one second circuit area. The first circuit area includes at least one first gate drive circuit; the second circuit area includes at least one second gate drive circuit. The first gate drive circuit is cascaded with the second gate drive circuit. The first gate drive circuit includes a plurality of cascaded first gate drive units, and the second gate drive circuit includes a plurality of cascaded second gate drive units. A plurality of first gate drive units are sequentially arranged in a second direction, and a plurality of second gate drive units are sequentially arranged in the second direction.

公开(公告)号：US20230015542A1

公开(公告)日：2023-01-19

申请号：US17787686

申请日：2021-08-04

Applicant: Hefei Xinsheng Optoelectronics Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Ning LIU ,  Dacheng ZHANG ,  Cheng XU ,  Danyang MA ,  Liusong NI ,  Jun LIU

IPC: H01L27/32 ,  H01L51/52 ,  H01L51/56

Abstract: Provided are an array substrate, a display panel, a display apparatus and a method for manufacturing an array substrate. The array substrate includes: a base substrate; an active layer, which is located on one side of the base substrate, where the active layer includes a channel region, a conductive source region, which is located on one side of the channel region, and a conductive drain region, which is located on the other side of the channel region; and a metal layer, which is located on the side of the active layer that is away from the base substrate, where the metal layer includes a gate electrode and a signal line, which are arranged on the same layer, and the thickness of the gate electrode perpendicular to the base substrate is less than the thickness of the signal line perpendicular to the base substrate.

公开(公告)号：US20240212622A1

公开(公告)日：2024-06-27

申请号：US17794994

申请日：2021-08-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Pan XU ,  Hongli WANG ,  Danyang MA ,  Guoying WANG ,  Xing ZHANG ,  Chengyuan LUO ,  Ying HAN

IPC: G09G3/3266

CPC classification number: G09G3/3266

Abstract: A display substrate includes an underlayer substrate and a circuit structure layer. The circuit structure layer is located in a display area of the underlayer substrate. The circuit structure layer includes at least one first circuit area and at least one second circuit area. The first circuit area includes at least one first gate drive circuit; the second circuit area includes at least one second gate drive circuit. The first gate drive circuit is cascaded with the second gate drive circuit. The first gate drive circuit includes a plurality of cascaded first gate drive units, and the second gate drive circuit includes a plurality of cascaded second gate drive units. A plurality of first gate drive units are sequentially arranged in a second direction, and a plurality of second gate drive units are sequentially arranged in the second direction.