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1.发明申请公开(公告)号：US20200035317A1
公开(公告)日：2020-01-30
申请号：US16398706
申请日：2019-04-30
Inventor： Xuehuan Feng , Yongqian Li , Meng Li
Abstract: A gate drive circuit, a method of driving a gate drive circuit, a display device, and a method of manufacturing an array substrate are provided. The gate drive circuit includes a repair signal line, a plurality of output signal lines, and a plurality of shift register units that are cascaded. The repair signal line is configured to transmit the repair signal to the first output signal line. The plurality of shift register units include a first shift register unit and a plurality of second shift register units, and the plurality of second shift register units are correspondingly connected to the second output signal lines. The first output signal line corresponds to but is in a state of being disconnected to the first shift register unit, and the first output signal line and the plurality of second output signal lines are configured to output a set of shift pulse signals.
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公开(公告)号：US12300173B2
公开(公告)日：2025-05-13
申请号：US18289015
申请日：2023-01-19
Inventor： Zhidong Yuan , Yongqian Li
IPC: G09G3/3233 , G09G3/32 , G09G3/3258
Abstract: The present disclosure provides a pixel circuit, a display panel and a display apparatus, belongs to the field of display technology, and can solve a problem that a current time for compensating a threshold voltage is limited, and is easily affected by a sub-threshold voltage. The pixel circuit includes a reset sub-circuit, a data writing sub-circuit, a threshold compensation sub-circuit, a sub-threshold compensation sub-circuit, a driving transistor, a first storage capacitor, a first light emitting control sub-circuit, a second light emitting control sub-circuit and a light emitting device; the sub-threshold compensation sub-circuit is configured to store a voltage of a fourth node and compensate a sub-threshold of the driving transistor by using the voltage of the fourth node; the fourth node is a connection point between the sub-threshold compensation sub-circuit, a second electrode of the driving transistor, the data writing sub-circuit and the second light emitting control sub-circuit.
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公开(公告)号：US12300168B2
公开(公告)日：2025-05-13
申请号：US18026827
申请日：2022-06-14
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan
IPC: G09G3/3233 , H10K59/131
Abstract: Provided is a display panel. The display panel includes: a substrate; a plurality of first control lines and a plurality of second control lines on a side of the substrate; and a plurality of subpixels arranged in an array on the side of the substrate, wherein at least two of the plurality of subpixels share a first node; wherein the subpixel includes a first circuit and a second circuit, the first circuit and the second circuit being configured to control a voltage at the first node in response to a first control signal and a second control signal; wherein in the display panel, a sum of a number of the plurality of first control lines and a number of the plurality of second control lines is less than or equal to a number of the subpixels in a column direction.
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公开(公告)号：US12274128B2
公开(公告)日：2025-04-08
申请号：US17787943
申请日：2021-08-05
Inventor： Yongqian Li , Can Yuan
IPC: H01L27/14 , H01L27/12 , H10K59/121 , H10K59/131 , H10K59/12
Abstract: A display substrate, including: a base, and a plurality of sub-pixels arranged on the base. At least one of the plurality of sub-pixels includes a pixel driving circuit and a light-emitting element electrically connected to the pixel driving circuit. The pixel driving circuit includes a plurality of transistors and at least one storage capacitor. In a direction perpendicular to the base, the display substrate includes: a semiconductor layer, a first metal layer, a second metal layer, a third metal layer and a fourth metal layer, which are sequentially arranged on the base. The semiconductor layer includes: an active layer of the plurality of transistors. The first metal layer includes at least a scanning line extending in a first direction, a gate electrode of the plurality of transistors, and a first capacitor electrode plate of the storage capacitor.
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公开(公告)号：US12272414B2
公开(公告)日：2025-04-08
申请号：US18503575
申请日：2023-11-07
Inventor： Xuehuan Feng , Yongqian Li
IPC: G11C19/28 , G09G3/20 , G09G3/3266
Abstract: A shift register includes a first scan unit, a leakage prevention unit, and a leakage prevention input unit. The first scan unit includes a first input circuit configured to transmit an input signal to a first pull-up node. The leakage prevention input unit is configured to: transmit a first voltage signal to a leakage prevention input node; and transmit a second voltage signal to the leakage prevention input node. The first voltage signal and the second voltage signal are different. The leakage prevention unit is configured to transmit one of the first voltage signal and the second voltage signal from the leakage prevention input node to a first leakage prevention node.
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Patent Agency Ranking
公开(公告)号：US20250098479A1
公开(公告)日：2025-03-20
申请号：US18291759
申请日：2023-02-28
Inventor： Can Yuan , Yongqian Li , Cheng Xu , Dandan Zhou , Ning Liu
IPC: H10K59/80 , H10K59/122 , H10K59/131
Abstract: A display substrate is provided. The display substrate includes a planarization layer; a light emitting element on the planarization layer, including a first electrode, an organic layer on the first electrode, and a second electrode on a side of the organic layer away from the first electrode; an auxiliary electrode in a layer different from the second electrode; one or more first connecting structures electrically connecting the auxiliary electrode with the second electrode, respectively; and one or more second connecting structures electrically connecting the auxiliary electrode with the second electrode, respectively; wherein a respective first connecting structure of the one or more first connecting structures includes a conductive channel including a sintered conductive material; and the conductive channel is absent in the one or more second connecting structures.
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公开(公告)号：US12230188B2
公开(公告)日：2025-02-18
申请号：US18005017
申请日：2021-08-20
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , G09G3/32 , G11C19/28
Abstract: A shift resister includes a first scan unit and a black insertion circuit. The first scan unit includes a first input circuit and a first output circuit. The first input circuit is configured to transmit a display input signal to a first pull-up node. The first output circuit is configured to, in a case where the first input circuit transmits the display input signal to the first pull-up node, transmit a first clock signal to a first scan signal terminal. The black insertion circuit is configured to transmit a black insertion input signal to the first pull-up node. The first output circuit is further configured to, in a case where the black insertion circuit transmits the black insertion input signal to the first pull-up node, transmit the first clock signal to the first scan signal terminal.
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公开(公告)号：US20250046224A1
公开(公告)日：2025-02-06
申请号：US18924166
申请日：2024-10-23
Inventor： Xuehuan Feng , Yongqian Li
Abstract: A shift-register unit circuit includes a first input sub-circuit configured to have a display-input terminal to receive a display-input signal, and to provide a display output-control signal to a first node; a second input sub-circuit configured to have a blank-input terminal to receive a blank-input signal for charging a blank-control node, and to provide a blank output-control signal to the first node, wherein the second input sub-circuit includes an isolation sub-circuit, wherein the isolation sub-circuit is set between the first node and the blank-control node; an output sub-circuit configured to output signal under control of the first node; and an anti-leak sub-circuit configured to provide a working voltage level to an anti-leak connection point. The anti-leak sub-circuit includes a second anti-leak transistor connected to the isolation sub-circuit.
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公开(公告)号：USRE50290E1
公开(公告)日：2025-02-04
申请号：US17889180
申请日：2022-08-16
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , G09G3/3258 , G11C19/28
Abstract: A shift register is provided, which includes a blanking input circuit, a blanking control circuit, a blanking pull-down circuit, and a shift register circuit, and a twenty-ninth transistor. The blanking input circuit may provide a blanking input signal to a first control node according to a second clock signal. and comprise a first transistor The blanking control circuit may provide a first clock signal to a second control node and maintain a voltage difference between the first control node and the second control node, according to a voltage of the first control node. comprise a second transistor. The blanking pull-down circuit may provide a voltage of the second control node to a pull-down node according to the a first clock signal and comprise a third transistor and a third leakage-preventative transistor. The shift register circuit may provide a shift signal via a shift signal output terminal and a first drive signal via a first drive signal output terminal according to a voltage of the pull-down node.
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公开(公告)号：US12211438B2
公开(公告)日：2025-01-28
申请号：US17789938
申请日：2021-07-09
Inventor： Yongqian Li , Can Yuan , Zhongyuan Wu
IPC: G09G3/3233 , H10K59/131
Abstract: A display substrate and a display panel are provided. The display substrate includes: a base substrate; and a plurality of sub-pixels. Each sub-pixel includes a light-emitting element and a pixel circuit; the pixel circuit includes a driving circuit, a data writing circuit, a first control circuit, a second control circuit, and a light-emitting control circuit; the driving circuit is configured to control the driving current flowing through the light-emitting element; the light-emitting control circuit is configured to apply the driving current to the light-emitting element; the first control circuit is configured to write a reference voltage into the driving circuit; the second control circuit is configured to write an initial voltage into the first electrode of the light-emitting element; and orthographic projections of at least part of pixel circuits of every two adjacent sub-pixels in a same row of sub-pixels on the base substrate are mirror-symmetrical.
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