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公开(公告)号：US20250089505A1
公开(公告)日：2025-03-13
申请号：US18727345
申请日：2023-05-11
Inventor： Fei FANG , Ling SHI , Changchang LIU , Haoyu LI , Yuxin ZHANG
IPC: H10K59/131 , H10K59/121 , H10K59/65
Abstract: A display substrate is provided, which includes a first display area (A1). The first display area (A1) includes a plurality of display island areas (A11), which are arranged in an array, and light-transmitting areas (A121, A122), which are located between adjacent display island areas (A11). The display island areas (All) each includes: a plurality of first pixel circuits (11) and a plurality of first light-emitting elements (13), which are provided on a base. At least one first pixel circuit (11) is electrically connected to at least one first light-emitting element (13) and is configured to drive the at least one first light-emitting element (13) to emit light. The first pixel circuits (11) in adjacent display island areas (A11) are connected by means of a plurality of first signal traces in a first direction (X).
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公开(公告)号：US20250081766A1
公开(公告)日：2025-03-06
申请号：US18288704
申请日：2022-05-25
Inventor： Yipeng CHEN , Ling SHI
IPC: H10K59/131 , H10K59/123
Abstract: A display substrate and a display device are provided. In the display substrate, the plurality of signal lines includes a first initialization signal line, a reset control signal line, and a second initialization signal line. The plurality of transistors include a first reset transistor and a second reset transistor, a gate electrode of the first reset transistor and a gate electrode of the second reset transistor are electrically connected with the reset control signal line, an orthographic projection of at least one of the first initialization signal line and the second initialization signal line on the base substrate does not overlap with an orthographic projection of the reset control signal line on the base substrate.
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公开(公告)号：US20240304150A1
公开(公告)日：2024-09-12
申请号：US18667571
申请日：2024-05-17
Inventor： Tinghua SHANG , Haigang QING , Pengfei YU , Yu WANG , Tingliang LIU , Ling SHI , Yao HUANG
IPC: G09G3/3258 , G09G3/20 , G09G3/3266 , G09G3/3291 , H10K50/814 , H10K59/121 , H10K59/124 , H10K59/131 , H10K59/35 , H10K59/80 , H10K59/82
CPC classification number: G09G3/3258 , G09G3/2003 , G09G3/3266 , G09G3/3291 , H10K50/814 , H10K59/121 , H10K59/1213 , H10K59/124 , H10K59/131 , H10K59/352 , H10K59/353 , H10K59/805 , H10K59/82 , G09G2300/0426 , G09G2300/0443
Abstract: A display substrate and a display device are provided. The display substrate includes sub-pixels, first data lines, and first power signal lines. The sub-pixel includes a light emitting element including a second electrode. The sub-pixel includes a first connecting portion including a first sub-connecting portion and a first block. The second electrode is overlapped with the first data line, the first power signal line and the first connecting portion, the first power signal line and the first data line are located at both sides of the first connecting portion. A ratio of a minimum distance between edges of the first sub-connecting portion and the first data line which are close to each other to a minimum distance between edges of the first block and the first power signal line which are close to each other is in a range from 0.8 to 1.2.
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4.发明公开公开(公告)号：US20240203316A1
公开(公告)日：2024-06-20
申请号：US17910539
申请日：2021-10-25
Inventor： Zhu WANG , Zhenglong YAN , Hui LU , Ke LIU , Ling SHI , Yipeng CHEN
CPC classification number: G09G3/2092 , G09G2310/0286 , G09G2310/08 , G11C19/28
Abstract: The present disclosure provides a shift register unit and a driving method therefor, a gate drive circuit, and a display device, belonging to the field of display technologies. In the shift register unit, a first input circuit can control a potential of a first node under control of a first clock signal provided by a first clock terminal and control a potential of a third node under control of a potential of a second node. A second input circuit can control the potential of the second node under control of the first clock signal, an input control signal provided by an input control terminal, the potential of the third node, and the potential of the first node. An output circuit can transmit a pull-up power signal at a high potential or a pull-down power signal at a low potential to an output terminal under control of the third node. In this way, the potential of the output terminal can be reliably controlled only by flexibly setting clock signals provided by two clock terminals and the input control signal provided by the input control terminal. The control process is simple, and the control flexibility is high.
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公开(公告)号：US20230282169A1
公开(公告)日：2023-09-07
申请号：US18315556
申请日：2023-05-11
Inventor： Tinghua SHANG , Yang ZHOU , Haigang QING , Linhong HAN , Ling SHI , Yao HUANG
IPC: G09G3/3258 , G09G3/20 , G09G3/3266 , G09G3/3291 , H10K50/814 , H10K59/124 , H10K59/131 , H10K59/35 , H10K59/121
CPC classification number: G09G3/3258 , G09G3/2003 , G09G3/3266 , G09G3/3291 , H10K50/814 , H10K59/124 , H10K59/131 , H10K59/353 , H10K59/1213 , G09G2300/0426 , G09G2300/0443
Abstract: A display substrate and a display device are provided. Sub-pixels in the display substrate include a first electrode, a light emitting layer and a second electrode which are sequentially stacked; each second electrode includes a main body electrode and a connecting electrode. The sub-pixels include first color sub-pixels and second color sub-pixels, the main body electrode of a same first color sub-pixel is a continuous electrode. The sub-pixels include sub-pixel pairs, each sub-pixel pair includes a first pixel block and a second pixel block, a shape of the second electrode of the second pixel block is different from that of the second electrode of the first pixel block.
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Patent Agency Ranking
公开(公告)号：US20230093654A1
公开(公告)日：2023-03-23
申请号：US17785742
申请日：2021-09-14
Inventor： Wenqiang LI , Chuntong JIANG , Ling SHI , Yipeng CHEN , Shuai XIE
IPC: G09G3/20
Abstract: The present disclosure provides a gate driving unit, a gate driving method, a gate driving circuit and a display device. The gate driving unit includes a first clock signal end, a second clock signal end, a third clock signal end, a fourth clock signal end, a first output node control circuitry, a second output node control circuitry, a first control node control circuitry and an output circuitry. According to the present disclosure, it is able to provide a gate driving signal for an N-type transistor in an LTPO pixel circuit, and reduce the number of transistors, thereby to provide a narrow bezel.
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公开(公告)号：US20220343854A1
公开(公告)日：2022-10-27
申请号：US17433107
申请日：2020-04-30
Inventor： Wenqiang LI , Ke LIU , Ling SHI
IPC: G09G3/3266 , G11C19/28
Abstract: A display substrate and a manufacture method, and a display device are provided. The display substrate includes a shift register unit, a first clock signal line, and a second clock signal line. The shift register unit includes an input circuit, an output circuit, a first control circuit, a second control circuit, and a voltage stabilizing circuit. A first electrode of the first noise reduction transistor of the second control circuit and a first electrode of the voltage stabilizing transistor of the voltage stabilizing circuit are in a first source-drain electrode layer, which includes a first transfer electrode, which includes a first portion and a second portion, the first portion is connected to the first electrode of the first noise reduction transistor and the first electrode of the voltage stabilizing transistor, and the second portion is connected to the gate electrode of the first control transistor of the first control circuit.
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公开(公告)号：US20220328589A1
公开(公告)日：2022-10-13
申请号：US17437936
申请日：2020-10-27
Inventor： Yipeng CHEN , Ling SHI , Wenqiang LI , Shuai XIE , Yang YU
IPC: H01L27/32
Abstract: This disclosure provides an array substrate and a display device. In the array substrate, the pixel driving circuit includes a driving transistor, a first transistor and a second transistor. The driving transistor and the first transistor are P-type transistors, and the second transistor is N-type transistor. The array substrate also includes a base substrate, and a first conductive layer arranged at a side of the base substrate and including: a first conductive portion forming a gate electrode of the driving transistor; a first gate line at a side of the first conductive portion, a part of the first gate line being configured to form a gate electrode of the first transistor; and a second gate line at a side of the first gate line away from the first conductive portion, a part of the second gate line being configured to form a first gate electrode of the second transistor.
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公开(公告)号：US20220293057A1
公开(公告)日：2022-09-15
申请号：US17828211
申请日：2022-05-31
Inventor： Tinghua SHANG , Yang ZHOU , Haigang QING , Linhong HAN , Ling SHI , Yao HUANG
IPC: G09G3/3258 , G09G3/20 , G09G3/3266 , G09G3/3291 , H01L27/32 , H01L51/52
Abstract: A display substrate and a display device are provided. A sub-pixel in the display substrate includes a light emitting element and a pixel circuit; the light emitting element includes a first electrode, a light emitting layer and a second electrode; the pixel circuit includes a driving transistor and a storage capacitor. The sub-pixel includes a first color sub-pixel pair which includes a first pixel block and a second pixel block. In a same first color sub-pixel pair, an overlapping situation, of orthographic projections of the second electrode of one first pixel block and a gate electrode of the driving transistor of the one first pixel block on the base substrate, is the same as an overlapping situation, of orthographic projections of the second electrode of one second pixel block and a gate electrode of the driving transistor of the one second pixel block on the base substrate.
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公开(公告)号：US20220093692A1
公开(公告)日：2022-03-24
申请号：US17228908
申请日：2021-04-13
Abstract: The present disclosure provides a display motherboard, a method for fabricating the same, and a method for aligning the same. The display motherboard includes an array substrate on which an alignment mark and a color film layer are provided. A portion of a black matrix of the color film layer in an alignment mark area includes a first light-shielding portion and a second light-shielding portion. The first light-shielding portion covers the alignment mark, and the second light-shielding portion covers an area outside the alignment mark, where upper surfaces of the first light-shielding portion and the second light-shielding portion are not in the same plane. When the display motherboard is aligned in the subsequent processes, since the black matrix forms the same pattern as the alignment mark due to a height step, when the exposure machine exposures, the pattern can be directly captured for alignment.
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