Fault detection arrangement for digital transmission system
    1.
    发明授权
    Fault detection arrangement for digital transmission system 失效
    数字传输系统的故障检测装置

    公开(公告)号:US3914741A

    公开(公告)日:1975-10-21

    申请号:US41163373

    申请日:1973-11-01

    CPC classification number: G06F11/10 H04L1/004 H04Q3/54591

    Abstract: A digital information transmission system includes a control unit for transmitting digital words each including an address, message, and an error detecting code derived from the address and messsage to a plurality of uniquely addressable peripheral units over a common bus. Each peripheral unit includes a register which stores its address and when a digital word is received by a peripheral unit the address stored in its register is compared with the transmitted address and the transmitted error detecting code is compared with an error detection code generated from the received message and the stored digital address. When both the transmitted and the stored addresses match and the transmitted and the generated error detecting codes match, the utilization portion of the peripheral unit is enabled to respond to the transmitted message.

    Abstract translation: 数字信息传输系统包括一个控制单元,用于通过公共总线向多个唯一可寻址的外围单元发送每个包括地址,消息和从地址和消息导出的错误检测码的数字字。 每个外围单元包括存储其地址的寄存器,并且当外围单元接收数字字时,将其寄存器中存储的地址与发送的地址进行比较,并将发送的错误检测码与从接收到的错误检测码产生的错误检测码进行比较 消息和存储的数字地址。 当发送和存储的地址都匹配并且所发送的和所生成的错误检测码匹配时,外围单元的利用部分能够响应所发送的消息。

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