公开(公告)号：US20210397596A1

公开(公告)日：2021-12-23

申请号：US17028920

申请日：2020-09-22

Applicant: Apple Inc.

Inventor： Albert ANTONY ,  Francesco ROSSI ,  Guillaume TARTAVEL ,  Xiaojin SHI ,  Marco ZULIANI

IPC: G06F16/22 ,  G06N3/04

Abstract: The subject technology provides a framework for evaluating activation functions of a neural network using lookup tables. In order to provide lookup table based activation functions with a desired precision within hardware constraints for the lookup tables, multiple lookup tables for each activation function can be provided. Each of the multiple lookup tables may correspond to a respective subrange of input values, within a full range of input values for the activation function.

公开(公告)号：US20200379740A1

公开(公告)日：2020-12-03

申请号：US16583191

申请日：2019-09-25

Applicant: Apple Inc.

Inventor： Timothy S. PAEK ,  Francesco ROSSI ,  Jamil DHANANI ,  Keith P. AVERY ,  Minwoo JEONG ,  Xiaojin SHI ,  Harveen KAUR ,  Brandt M. WESTING

IPC: G06F8/41 ,  G06N3/04 ,  G06N3/08 ,  G06F8/60

Abstract: The subject technology receives a neural network model in a model format, the model format including information for a set of layers of the neural network model, each layer of the set of layers including a set of respective operations. The subject technology generates neural network (NN) code from the neural network model, the NN code being in a programming language distinct from the model format, and the NN code comprising a respective memory allocation for each respective layer of the set of layers of the neural network model, where the generating comprises determining the respective memory allocation for each respective layer based at least in part on a resource constraint of a target device. The subject technology compiles the NN code into a binary format. The subject technology generates a package for deploying the compiled NN code on the target device.

公开(公告)号：US20200082274A1

公开(公告)日：2020-03-12

申请号：US16262809

申请日：2019-01-30

Applicant: Apple Inc.

Inventor： Francesco ROSSI ,  Cecile M. FORET ,  Gaurav KAPOOR ,  Kit-Man WAN ,  Umesh S. VAISHAMPAYAN ,  Etienne BELANGER ,  Albert ANTONY ,  Alexey MARINICHEV ,  Marco ZULIANI ,  Xiaojin SHI

IPC: G06N3/10 ,  G06N3/04 ,  G06N3/08

Abstract: The subject technology provides receiving a neural network (NN) model to be executed on a target platform, the NN model including multiple layers that include operations and some of the operations being executable on multiple processors of the target platform. The subject technology further sorts the operations from the multiple layers in a particular order based at least in part on grouping the operations that are executable by a particular processor of the multiple processors. The subject technology determines, based at least in part on a cost of transferring the operations between the multiple processors, an assignment of one of the multiple processors for each of the sorted operations of each of the layers in a manner that minimizes a total cost of executing the operations. Further, for each layer of the NN model, the subject technology includes an annotation to indicate the processor assigned for each of the operations.

公开(公告)号：US20250131286A1

公开(公告)日：2025-04-24

申请号：US19000562

申请日：2024-12-23

Applicant: Apple Inc.

Inventor： Gaurav KAPOOR ,  Cecile M. FORET ,  Francesco ROSSI ,  Kit-Man WAN ,  Umesh S. VAISHAMPAYAN ,  Etienne BELANGER ,  Albert ANTONY ,  Alexey MARINICHEV ,  Marco ZULIANI ,  Xiaojin SHI

IPC: G06N3/10 ,  G06F8/41 ,  G06F9/50 ,  G06N3/04 ,  G06N3/063 ,  G06N3/08

Abstract: The subject technology provides receiving a neural network (NN) model to be executed on a target platform, the NN model including multiple layers that include operations and some of the operations being executable on multiple processors of the target platform. The subject technology further sorts the operations from the multiple layers in a particular order based at least in part on grouping the operations that are executable by a particular processor of the multiple processors. The subject technology determines, based at least in part on a cost of transferring the operations between the multiple processors, an assignment of one of the multiple processors for each of the sorted operations of each of the layers in a manner that minimizes a total cost of executing the operations. Further, for each layer of the NN model, the subject technology includes an annotation to indicate the processor assigned for each of the operations.

公开(公告)号：US20230177350A1

公开(公告)日：2023-06-08

申请号：US17903991

申请日：2022-09-06

Applicant: Apple Inc.

Inventor： Gaurav KAPOOR ,  Cecile M. FORET ,  Francesco ROSSI ,  Kit-Man WAN ,  Umesh S. VAISHAMPAYAN ,  Etienne BELANGER ,  Albert ANTONY ,  Alexey MARINICHEV ,  Marco ZULIANI ,  Xiaojin SHI

IPC: G06N3/10 ,  G06N3/08 ,  G06N3/04 ,  G06F8/41 ,  G06N3/063

CPC classification number: G06N3/10 ,  G06N3/08 ,  G06N3/04 ,  G06F8/443 ,  G06F8/41 ,  G06F8/4441 ,  G06N3/063 ,  G06F9/50

Abstract: The subject technology provides receiving a neural network (NN) model to be executed on a target platform, the NN model including multiple layers that include operations and some of the operations being executable on multiple processors of the target platform. The subject technology further sorts the operations from the multiple layers in a particular order based at least in part on grouping the operations that are executable by a particular processor of the multiple processors. The subject technology determines, based at least in part on a cost of transferring the operations between the multiple processors, an assignment of one of the multiple processors for each of the sorted operations of each of the layers in a manner that minimizes a total cost of executing the operations. Further, for each layer of the NN model, the subject technology includes an annotation to indicate the processor assigned for each of the operations.