公开(公告)号：US12118332B2

公开(公告)日：2024-10-15

申请号：US18045577

申请日：2022-10-11

Applicant: Apple Inc.

Inventor： Ali Sazegari ,  Segev Elmalem ,  O-Cheng Chang ,  Jingwei Zhang ,  Ido Soffair ,  Aaftab A. Munshi

IPC: G06F7/552

CPC classification number: G06F7/552

Abstract: Techniques are disclosed relating to dedicated power function circuitry for a floating-point power instruction. In some embodiments, execution circuitry is configured to execute a floating-point power instruction to evaluate the power function xy as 2y log2x. In some embodiments, base-2 logarithm circuitry is configured to evaluate a base-2 logarithm for a first input (e.g., log2 x) by determining coefficients for a polynomial function and evaluating the polynomial function using the determined coefficients and the first input. In some embodiments, multiplication circuitry multiplies the base-2 logarithm result by a second input to generate a multiplication result. In some embodiments, base-2 power function circuitry is configured to evaluate a base-2 power function for the multiplication result. Disclosed techniques may advantageously increase performance and reduce power consumption of floating-point power function operations with reasonable area and accuracy, relative to traditional techniques.

公开(公告)号：US20250053380A1

公开(公告)日：2025-02-13

申请号：US18825013

申请日：2024-09-05

Applicant: Apple Inc.

Inventor： Ali Sazegari, PhD ,  Segev Elmalem ,  O-Cheng Chang ,  Jingwei Zhang ,  Ido Soffair ,  Aaftab A. Munshi

IPC: G06F7/552

Abstract: Techniques are disclosed relating to dedicated power function circuitry for a floating-point power instruction. In some embodiments, execution circuitry is configured to execute a floating-point power instruction to evaluate the power function xy as 2y log2 x. In some embodiments, base-2 logarithm circuitry is configured to evaluate a base-2 logarithm for a first input (e.g., log2 x) by determining coefficients for a polynomial function and evaluating the polynomial function using the determined coefficients and the first input. In some embodiments, multiplication circuitry multiplies the base-2 logarithm result by a second input to generate a multiplication result. In some embodiments, base-2 power function circuitry is configured to evaluate a base-2 power function for the multiplication result. Disclosed techniques may advantageously increase performance and reduce power consumption of floating-point power function operations with reasonable area and accuracy, relative to traditional techniques.

公开(公告)号：US20240094989A1

公开(公告)日：2024-03-21

申请号：US18045577

申请日：2022-10-11

Applicant: Apple Inc.

Inventor： Ali Sazegari ,  Segev Elmalem ,  O-Cheng Chang ,  Jingwei Zhang ,  Ido Soffair ,  Aaftab A. Munshi

IPC: G06F7/487

CPC classification number: G06F7/4876

Abstract: Techniques are disclosed relating to dedicated power function circuitry for a floating-point power instruction. In some embodiments, execution circuitry is configured to execute a floating-point power instruction to evaluate the power function xy as 2y log2x. In some embodiments, base-2 logarithm circuitry is configured to evaluate a base-2 logarithm for a first input (e.g., log2 x) by determining coefficients for a polynomial function and evaluating the polynomial function using the determined coefficients and the first input. In some embodiments, multiplication circuitry multiplies the base-2 logarithm result by a second input to generate a multiplication result. In some embodiments, base-2 power function circuitry is configured to evaluate a base-2 power function for the multiplication result. Disclosed techniques may advantageously increase performance and reduce power consumption of floating-point power function operations with reasonable area and accuracy, relative to traditional techniques.

公开(公告)号：US20200241876A1

公开(公告)日：2020-07-30

申请号：US16847068

申请日：2020-04-13

Applicant: Apple Inc.

Inventor： O-Cheng Chang ,  Tal Uliel ,  Eric Bainville ,  Jeffry E. Gonion ,  Ali Sazegari

IPC: G06F9/30 ,  G06F9/38

Abstract: In an embodiment, a processor (e.g. a CPU) may offload transcendental computation to a computation engine that may efficiently perform transcendental functions. The computation engine may implement a range instruction that may be included in a program being executed by the CPU. The CPU may dispatch the range instruction to the computation engine. The range instruction may take an input operand (that is to be evaluated in a transcendental function, for example) and may reference a range table that defines a set of ranges for the transcendental function. The range instruction may identify one of the set of ranges that includes the input operand. For example, the range instruction may output an interval number identifying which interval of an overall set of valid input values contains the input operand. In an embodiment, the range instruction may take an input vector operand and output a vector of interval identifiers.

公开(公告)号：US20190250917A1

公开(公告)日：2019-08-15

申请号：US15896582

申请日：2018-02-14

Applicant: Apple Inc.

Inventor： O-Cheng Chang ,  Tal Uliel ,  Eric Bainville ,  Jeffry E. Gonion ,  Ali Sazegari

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/30076 ,  G06F9/3004 ,  G06F9/3802

Abstract: In an embodiment, a computation engine may offload a processor (e.g. a CPU) and efficiently perform transcendental functions. The computation engine may implement a range instruction that may be included in a program being executed by the CPU. The CPU may dispatch the range instruction to the computation engine. The range instruction may take an input operand (that is to be evaluated in a transcendental function, for example) and may reference a range table that defines a set of ranges for the transcendental function. The range instruction may identify one of the set of ranges that includes the input operand. For example, the range instruction may output an interval number identifying which interval of an overall set of valid input values contains the input operand. In an embodiment, the range instruction may take an input vector operand and output a vector of interval identifiers.