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公开(公告)号:US20170263561A1
公开(公告)日:2017-09-14
申请号:US15246481
申请日:2016-08-24
Applicant: Apple Inc.
Inventor: Anne M. Mason , Peter J. Johnston , Christine A. Laliberte , Dominic P. McCarthy , Shawn X. Arnold , Souvik Mukherjee
CPC classification number: H01L23/5386 , H01C7/00 , H01L23/5383 , H01L23/5384 , H01L23/5385 , H01L24/17 , H01L25/18 , H01L2224/13147 , H01L2224/16227 , H01L2924/1434 , H01L2924/19043 , H05K1/113 , H05K1/167 , H05K1/181 , H05K3/3436 , H05K3/4076 , H05K2201/096 , H05K2201/10159 , H05K2201/10378 , H05K2201/10734 , Y02P70/613
Abstract: A routing apparatus includes a PCB having first and second arrays of contact pads, an interposer having third, fourth and fifth arrays of contact pads, the third and fourth arrays of contact pads being disposed on opposing surfaces of the interposer, the third array of contact pads being electrically connected to the first array of contact pads. First and second integrated circuits are respectively mounted on the second and fourth arrays of contact pads. The interposer includes a first group of conductive traces insulated from one another, a first array of conductive vias extending perpendicularly to the first group of conductive traces, the first array of conductive vias including through-vias connecting the third array of contact pads to corresponding contact pads in the fourth array of contact pads. The interposer further including isolation resistors embedded within the first array of conductive vias, each isolation resistor being configured to produce a copy of a signal flowing through the conductive via that is coupled to one end of the isolation resistor on the conductive trace that is coupled to an opposite end of the isolation resistor.
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公开(公告)号:US09763329B1
公开(公告)日:2017-09-12
申请号:US15068474
申请日:2016-03-11
Applicant: Apple Inc.
Inventor: Anne M. Mason , Peter J. Johnston , Christine A. Laliberte , Dominic P. McCarthy , Shawn X. Arnold , Souvik Mukherjee
CPC classification number: H01L23/5386 , H01C7/00 , H01L23/5383 , H01L23/5384 , H01L23/5385 , H01L24/17 , H01L25/18 , H01L2224/13147 , H01L2224/16227 , H01L2924/1434 , H01L2924/19043 , H05K1/113 , H05K1/167 , H05K1/181 , H05K3/3436 , H05K3/4076 , H05K2201/096 , H05K2201/10159 , H05K2201/10378 , H05K2201/10734 , Y02P70/613
Abstract: A circuit board includes conductive traces being sandwiched by an upper insulating layer and a lower insulating layer, a first array of conductive vias extending perpendicularly to the conductive traces, the vias in the first array of conductive vias being arranged such that any two adjacent vias in a row of vias extending along any given dimension in the first array of conductive vias are equally spaced from each other, and isolation resistors embedded within the first array of conductive vias such that each isolation resistor is disposed between at least two adjacent vias in the first array of conductive vias, each isolation resistor being disposed closer to the conductive via to which the isolation resistor is coupled than all other conductive vias surrounding the isolation resistor.
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公开(公告)号:US09955570B2
公开(公告)日:2018-04-24
申请号:US14975581
申请日:2015-12-18
Applicant: Apple Inc.
Inventor: Matthew W. Blum , Christine A. Laliberte , Corey N. Axelowitz , James Y. Yap
CPC classification number: H05K1/028 , H05K1/0216 , H05K1/0218 , H05K1/118 , H05K1/14 , H05K1/147 , H05K1/181 , H05K1/189 , H05K5/0247 , H05K2201/05 , H05K2201/056 , H05K2201/0715
Abstract: The subject matter of this disclosure relates to a flexible circuit for carrying a signal between electrical components that includes boosting circuitry for mitigating the effects of signal degradation. More particularly the flexible circuit can carry a signal between a main logic board and an input/output board supporting input/output ports of a portable electronic device. The flexible circuit can be configured with bends in order to meet packaging constraints such as avoiding contact with components obstructing a direct path between connectors of the electrical components. Additional bends can also be included in the flexible that facilitate the assembly of the portable electronic device.
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公开(公告)号:US09812401B2
公开(公告)日:2017-11-07
申请号:US15246481
申请日:2016-08-24
Applicant: Apple Inc.
Inventor: Anne M. Mason , Peter J. Johnston , Christine A. Laliberte , Dominic P. McCarthy , Shawn X. Arnold , Souvik Mukherjee
CPC classification number: H01L23/5386 , H01C7/00 , H01L23/5383 , H01L23/5384 , H01L23/5385 , H01L24/17 , H01L25/18 , H01L2224/13147 , H01L2224/16227 , H01L2924/1434 , H01L2924/19043 , H05K1/113 , H05K1/167 , H05K1/181 , H05K3/3436 , H05K3/4076 , H05K2201/096 , H05K2201/10159 , H05K2201/10378 , H05K2201/10734 , Y02P70/613
Abstract: A routing apparatus includes a PCB having first and second arrays of contact pads, an interposer having third, fourth and fifth arrays of contact pads, the third and fourth arrays of contact pads being disposed on opposing surfaces of the interposer, the third array of contact pads being electrically connected to the first array of contact pads. First and second integrated circuits are respectively mounted on the second and fourth arrays of contact pads. The interposer includes a first group of conductive traces insulated from one another, a first array of conductive vias extending perpendicularly to the first group of conductive traces, the first array of conductive vias including through-vias connecting the third array of contact pads to corresponding contact pads in the fourth array of contact pads. The interposer further including isolation resistors embedded within the first array of conductive vias, each isolation resistor being configured to produce a copy of a signal flowing through the conductive via that is coupled to one end of the isolation resistor on the conductive trace that is coupled to an opposite end of the isolation resistor.
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公开(公告)号:US20170265304A1
公开(公告)日:2017-09-14
申请号:US15068474
申请日:2016-03-11
Applicant: Apple Inc.
Inventor: Anne M. Mason , Peter J. Johnston , Christine A. Laliberte , Dominic P. McCarthy , Shawn X. Arnold , Souvik Mukherjee
CPC classification number: H01L23/5386 , H01C7/00 , H01L23/5383 , H01L23/5384 , H01L23/5385 , H01L24/17 , H01L25/18 , H01L2224/13147 , H01L2224/16227 , H01L2924/1434 , H01L2924/19043 , H05K1/113 , H05K1/167 , H05K1/181 , H05K3/3436 , H05K3/4076 , H05K2201/096 , H05K2201/10159 , H05K2201/10378 , H05K2201/10734 , Y02P70/613
Abstract: A circuit board includes conductive traces being sandwiched by an upper insulating layer and a lower insulating layer, a first array of conductive vias extending perpendicularly to the conductive traces, the vias in the first array of conductive vias being arranged such that any two adjacent vias in a row of vias extending along any given dimension in the first array of conductive vias are equally spaced from each other, and isolation resistors embedded within the first array of conductive vias such that each isolation resistor is disposed between at least two adjacent vias in the first array of conductive vias, each isolation resistor being disposed closer to the conductive via to which the isolation resistor is coupled than all other conductive vias surrounding the isolation resistor.
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