公开(公告)号：US20230142948A1

公开(公告)日：2023-05-11

申请号：US18150783

申请日：2023-01-05

Applicant: Apple Inc.

Inventor： Alexander PALEY ,  Andrew W. VOGAN

IPC: G06F3/06

CPC classification number: G06F3/0647 ,  G06F3/0613 ,  G06F3/068 ,  G06F3/064 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0689 ,  G06F2213/28 ,  G06F13/28

Abstract: Disclosed herein are techniques for managing context information for data stored within a non-volatile memory of a computing device. According to some embodiments, the method can include (1) loading, into a volatile memory of the computing device, the context information from the non-volatile memory, where the context information is separated into a plurality of silos, (2) writing transactions into a log stored within the non-volatile memory, and (3) each time a condition is satisfied: (i) identifying a next silo of the plurality of silos to be written into the non-volatile memory, (ii) updating the next silo to reflect the transactions that apply to the next silo, and (iii) writing the next silo into the non-volatile memory. In turn, when an inadvertent shutdown of the computing device occurs, the silos of which the context information is comprised can be sequentially accessed and restored in an efficient manner.

公开(公告)号：US20160335198A1

公开(公告)日：2016-11-17

申请号：US14710495

申请日：2015-05-12

Applicant: Apple Inc.

Inventor： Andrew W. VOGAN ,  Evgeny TELEVITCKIY

IPC: G06F12/12

CPC classification number: G06F12/128 ,  G06F12/023

Abstract: Disclosed herein are techniques for maintaining an indirection manager for a mass storage device. According to some embodiments, the indirection manager is configured to implement different algorithms that orchestrate a manner in which data is read from and written into memory sectors when handling I/O requests output by a computing device that is communicatively coupled to the mass storage device. Specifically, the algorithms utilize a mapping table that is limited to two levels of hierarchy: a first tier and a second tier, which constrains the overall size and complexity of the mapping table and can increase performance. The embodiments also set forth a memory manager that is configured to work in conjunction with the indirection manager to provide a mechanism for efficiently allocating and de-allocating variably-sized groups of sectors.

Abstract translation: 这里公开了用于维护大容量存储设备的间接管理器的技术。 根据一些实施例，间接管理器被配置为实现不同的算法，其在处理由通信地耦合到大容量存储设备的计算设备输出的I / O请求时，编排数据从存储器扇区读取和写入存储器扇区的方式。 具体来说，算法利用了限于层次结构的两个层次的映射表：第一层和第二层，这限制了映射表的总体大小和复杂性，并且可以提高性能。 这些实施例还提出了一种存储器管理器，其被配置为与间接管理器一起工作，以提供用于有效地分配和取消分配可变大小的扇区组的机制。

公开(公告)号：US20240264777A1

公开(公告)日：2024-08-08

申请号：US18639614

申请日：2024-04-18

Applicant: Apple Inc.

Inventor： Matthew J. BYOM ,  Tudor ANTONIU ,  Alexander PALEY ,  Andrew W. VOGAN ,  Muhammad N. ASHRAF

IPC: G06F3/06 ,  G06F12/0875

CPC classification number: G06F3/0659 ,  G06F3/061 ,  G06F3/0644 ,  G06F3/0679 ,  G06F12/0875 ,  G06F2212/1016

Abstract: Disclosed herein are techniques for balancing write commands directed to a non-volatile memory. According to some embodiments, a method may include caching a plurality of write commands into a write cache, and, in response to determining that an available capacity of the write cache satisfies a first threshold value: performing at least one write operation by directing data associated with the write commands in the write cache to the first partition of the non-volatile memory in response to determining that an available capacity of a first partition of the non-volatile memory satisfies a second threshold value; and performing at least one write operation by directing data associated with the write commands in the write cache to a second partition of the non-volatile memory in response to determining that the available capacity of the first partition of the non-volatile memory does not satisfy the second threshold value.

公开(公告)号：US20220147258A1

公开(公告)日：2022-05-12

申请号：US17648540

申请日：2022-01-20

Applicant: Apple Inc.

Inventor： Alexander PALEY ,  Andrew W. VOGAN

IPC: G06F3/06

Abstract: Systems and methods for balancing multiple partitions of non-volatile memory devices are provided. Embodiments discussed herein execute a balance proportion scheme in connection with a NVM that is partitioned to have multiple partition types. Each partition type has an associated endurance that defines an average number of program/erase (P/E) cycles it can endure before it reaches failure. For example, a first partition type may have a substantially greater endurance than a second partition type. The balance proportion scheme ensures that, even though each partition type has a different associated endurance, all partition types are used proportionally with respect to each other to balance their respective P/E cycles. This way, both partition types will reach the upper limits of their respective endurance levels out at approximately the same time.

公开(公告)号：US20190102100A1

公开(公告)日：2019-04-04

申请号：US15721285

申请日：2017-09-29

Applicant: Apple Inc.

Inventor： Andrew W. VOGAN

IPC: G06F3/06

Abstract: Disclosed herein are techniques for managing partitions on a storage device. A method can include (1) identifying a storage capacity of the storage device, (2) generating a first data structure that defines a first partition on the storage device, where the first partition consumes a first amount of the storage capacity, and (3) generating a second data structure that defines a second partition on the storage device, where the second partition consumes at least a portion of a remaining amount of the storage capacity relative to the first amount. In response to receiving a shrink request directed to the first partition, the method can further include (4) identifying a first utilized area within the first partition that will no longer be utilized as a result of the shrink request, and (5) updating first information in the first data structure to indicate that the first utilized area is unutilized.

公开(公告)号：US20220326877A1

公开(公告)日：2022-10-13

申请号：US17222978

申请日：2021-04-05

Applicant: Apple Inc.

Inventor： Matthew J. BYOM ,  Tudor ANTONIU ,  Alexander PALEY ,  Andrew W. VOGAN ,  Muhammad N. ASHRAF

IPC: G06F3/06 ,  G06F12/0875

Abstract: Disclosed herein are techniques for balancing write commands directed to a non-volatile memory. According to some embodiments, a method may include caching a plurality of write commands into a write cache, and, in response to determining that an available capacity of the write cache satisfies a first threshold value: performing at least one write operation by directing data associated with the write commands in the write cache to the first partition of the non-volatile memory in response to determining that an available capacity of a first partition of the non-volatile memory satisfies a second threshold value; and performing at least one write operation by directing data associated with the write commands in the write cache to a second partition of the non-volatile memory in response to determining that the available capacity of the first partition of the non-volatile memory does not satisfy the second threshold value.

公开(公告)号：US20200089580A1

公开(公告)日：2020-03-19

申请号：US16136189

申请日：2018-09-19

Applicant: Apple Inc.

Inventor： Alexander PALEY ,  Andrew W. VOGAN ,  Tudor ANTONIU

IPC: G06F11/14 ,  G06F11/10 ,  G06F12/02

Abstract: Disclosed are techniques for managing context information for data stored within a computing device. According to some embodiments, the method can include the steps of (1) loading, into a volatile memory of the computing device, the context information from a non-volatile memory of the computing device, where the context information is separated into a plurality of portions, and each portion of the plurality of portions is separated into a plurality of sub-portions, (2) writing transactions into a log stored within the non-volatile memory, and (3) each time a condition is satisfied: identifying a next sub-portion to be processed, where the next sub-portion is included in the plurality of sub-portions of a current portion being processed, identifying a portion of the context information that corresponds to the next sub-portion, converting the portion from a first format to a second format, and writing the portion into the non-volatile memory.

公开(公告)号：US20190102101A1

公开(公告)日：2019-04-04

申请号：US15721081

申请日：2017-09-29

Applicant: Apple Inc.

Inventor： Alexander PALEY ,  Andrew W. VOGAN

IPC: G06F3/06 ,  G06F13/28

Abstract: Disclosed herein are techniques for managing context information for data stored within a non-volatile memory of a computing device. According to some embodiments, the method can include (1) loading, into a volatile memory of the computing device, the context information from the non-volatile memory, where the context information is separated into a plurality of silos, (2) writing transactions into a log stored within the non-volatile memory, and (3) each time a condition is satisfied: (i) identifying a next silo of the plurality of silos to be written into the non-volatile memory, (ii) updating the next silo to reflect the transactions that apply to the next silo, and (iii) writing the next silo into the non-volatile memory. In turn, when an inadvertent shutdown of the computing device occurs, the silos of which the context information is comprised can be sequentially accessed and restored in an efficient manner.

公开(公告)号：US20250021537A1

公开(公告)日：2025-01-16

申请号：US18544255

申请日：2023-12-18

Applicant: Apple Inc.

Inventor： Andrew W. VOGAN ,  Yoram SHACHAM

IPC: G06F16/22 ,  G06F11/34 ,  G06F16/2455

Abstract: Some techniques are described herein for iteratively searching a search space while prefetching data needed for subsequent searches. Such techniques can be tree-based and use a different binary search for each iteration. In addition, some techniques are described herein using a data structure that includes void elements for reserving space in the data structure for new storage updates. Such techniques can automatically add additional void elements while a computer system is idle and/or stop adding the additional void elements after a predetermined time has passed. In addition, such techniques can tailor the number of void elements for different areas of the data structure based on previous and/or predicted use.

公开(公告)号：US20190286369A1

公开(公告)日：2019-09-19

申请号：US16124154

申请日：2018-09-06

Applicant: Apple Inc.

Inventor： Yuhua LIU ,  Andrew W. VOGAN ,  Matthew J. BYOM ,  Alexander PALEY

IPC: G06F3/06

Abstract: Disclosed herein are techniques for reducing write amplification when processing write commands directed to a non-volatile memory. According to some embodiments, the method can include the steps of (1) receiving a first plurality of write commands and a second plurality of write commands, where the first plurality of write commands and the second plurality of write commands are separated by a fence command (2) caching the first plurality of write commands, the second plurality of write commands, and the fence command, and (3) in accordance with the fence command, and in response to identifying that at least one condition is satisfied: (i) issuing the first plurality of write commands to the non-volatile memory, (ii) issuing the second plurality of write commands to the non-volatile memory, and (iii) updating log information to reflect that the first plurality of write commands precede the second plurality of write commands.