公开(公告)号：US09892802B1

公开(公告)日：2018-02-13

申请号：US14714381

申请日：2015-05-18

Applicant: Apple Inc.

Inventor： Bo Yang ,  Andrew J. Copperhall ,  Bibo Li ,  Vijay M. Bettada

IPC: G11C29/10 ,  G01R31/3177 ,  G11C29/50

CPC classification number: G11C29/10 ,  G01R31/3177

Abstract: A hardware assisted scheme for testing IC memories using scan circuitry is disclosed. An IC includes a memory implemented thereon and a chain of serially-coupled scan elements to enable the inputting of test vectors. The scan elements include first and second subsets forming write and read address registers, respectively, a first control flop, and a second control flop. During a launch cycle of a test operation, a first address loaded into the write address register is provided to a write address decoder to effect a write operation. Also responsive to the launch cycle, the first control flop is configured to cause the first address to be provided to the read address register, while the second control flop causes data to be written into the memory. During a capture cycle, the first address is provided to a read address decoder and the second control flop causes a read of data therefrom.

公开(公告)号：US20160091564A1

公开(公告)日：2016-03-31

申请号：US14502284

申请日：2014-09-30

Applicant: Apple Inc.

Inventor： Bibo Li ,  Andrew J. Copperhall ,  Bo Yang

IPC: G01R31/3177

CPC classification number: G01R31/318566 ,  G01R31/318544

Abstract: Techniques are disclosed relating to test equipment. In one embodiment, a method includes receiving failure information from a first test of a device under test (DUT). In this embodiment, the DUT includes a plurality of scan chains that each include a plurality of scan cells. In this embodiment, the first test is based on a first compressed test pattern. In this embodiment, the failure information does not permit a definitive determination as to which scan cell is a failing scan cell. In this embodiment, the method includes generating a plurality of compressed test patterns based on the first compressed test pattern. In this embodiment, the plurality of compressed test patterns specify one-to-one-modes. In this embodiment, the method includes performing one or more second tests of the DUT using the plurality of compressed test patterns to definitively determine one or more failing scan cells.

Abstract translation: 公开了与测试设备有关的技术。 在一个实施例中，一种方法包括从被测设备（DUT）的第一测试接收故障信息。 在该实施例中，DUT包括多个扫描链，每条扫描链包括多个扫描单元。 在该实施例中，第一测试基于第一压缩测试图案。 在本实施例中，故障信息不能确定哪个扫描单元是故障扫描单元。 在该实施例中，该方法包括基于第一压缩测试图案生成多个压缩测试图案。 在该实施例中，多个压缩测试图案指定一对一模式。 在该实施例中，该方法包括使用多个压缩测试模式来执行DUT的一个或多个第二测试，以确定确定一个或多个故障扫描单元。

公开(公告)号：US10891884B1

公开(公告)日：2021-01-12

申请号：US16281996

申请日：2019-02-21

Applicant: Apple Inc.

Inventor： Bo Yang ,  Xiang Lu ,  Andrew J. Copperhall ,  Henry C. Jen ,  Karthik Manickam ,  Sagar Nataraj ,  Shriram Vijayakumar ,  Derek K. Shaeffer

IPC: G09G3/00 ,  G09G3/32 ,  G01R31/3185 ,  G01R31/317 ,  G01R31/58

Abstract: Design-for-test (DFT) architectures, and methods of testing an array of chips, which may be identical, are described. In an embodiment, a comparison circuit includes a plurality of comparators to compare scan-data out (SDO) data streams with an expected data stream and transmit a compared data stream that is indicated of whether or not an error exists in any of the SDO data streams.

公开(公告)号：US09519026B2

公开(公告)日：2016-12-13

申请号：US14502284

申请日：2014-09-30

Applicant: Apple Inc.

Inventor： Bibo Li ,  Andrew J. Copperhall ,  Bo Yang

IPC: G01R31/28 ,  G01R31/3185

CPC classification number: G01R31/318566 ,  G01R31/318544

Abstract: Techniques are disclosed relating to test equipment. In one embodiment, a method includes receiving failure information from a first test of a device under test (DUT). In this embodiment, the DUT includes a plurality of scan chains that each include a plurality of scan cells. In this embodiment, the first test is based on a first compressed test pattern. In this embodiment, the failure information does not permit a definitive determination as to which scan cell is a failing scan cell. In this embodiment, the method includes generating a plurality of compressed test patterns based on the first compressed test pattern. In this embodiment, the plurality of compressed test patterns specify one-to-one-modes. In this embodiment, the method includes performing one or more second tests of the DUT using the plurality of compressed test patterns to definitively determine one or more failing scan cells.

Abstract translation: 公开了与测试设备有关的技术。 在一个实施例中，一种方法包括从被测设备（DUT）的第一测试接收故障信息。 在该实施例中，DUT包括多个扫描链，每条扫描链包括多个扫描单元。 在该实施例中，第一测试基于第一压缩测试图案。 在本实施例中，故障信息不能确定哪个扫描单元是故障扫描单元。 在该实施例中，该方法包括基于第一压缩测试图案生成多个压缩测试图案。 在该实施例中，多个压缩测试模式指定一对一模式。 在该实施例中，该方法包括使用多个压缩测试模式来执行DUT的一个或多个第二测试，以确定确定一个或多个故障扫描单元。