公开(公告)号：US10884043B1

公开(公告)日：2021-01-05

申请号：US16517402

申请日：2019-07-19

Applicant: Apple Inc.

Inventor： Michael Couleur ,  Andrea Acquas ,  Nikola Jovanovic

IPC: G01R25/00 ,  H03K5/135 ,  G06F1/04 ,  H03K4/90

Abstract: A power converter circuit included in a computer system may charge and discharge a switch node coupled to a regulated power supply node via an inductor. The power converter circuit may generate a reference clock signal using a system clock signal and a voltage level of the switch node. The reference clock signal may be used to initiate a charge cycle, whose duration may be based on generated ramp signals.

公开(公告)号：US10707761B1

公开(公告)日：2020-07-07

申请号：US16394823

申请日：2019-04-25

Applicant: Apple Inc.

Inventor： Michael Couleur ,  Andrea Acquas ,  Nicola Rasera

IPC: H02M3/158 ,  G06F1/26 ,  H02M3/156 ,  H02M3/157

Abstract: A power converter circuit included in a computer system may charge and discharge a switch node coupled to a regulated power supply node via an inductor. During a charge cycle, the power converter circuit may generate a reference ramp signal that has an initial voltage level greater than that of the switch node. The power converter may also generate a sense ramp signal using the voltage level of the switch node, and halt the charge cycle using results of a comparison of the respective voltage levels of the reference ramp signal and the sense ramp signal.

公开(公告)号：US20210018543A1

公开(公告)日：2021-01-21

申请号：US16517402

申请日：2019-07-19

Applicant: Apple Inc.

Inventor： Michael Couleur ,  Andrea Acquas ,  Nikola Jovanovic

IPC: G01R25/00 ,  H03K5/135

Abstract: A power converter circuit included in a computer system may charge and discharge a switch node coupled to a regulated power supply node via an inductor. The power converter circuit may generate a reference clock signal using a system clock signal and a voltage level of the switch node. The reference clock signal may be used to initiate a charge cycle, whose duration may be based on generated ramp signals.

公开(公告)号：US20240106328A1

公开(公告)日：2024-03-28

申请号：US17934398

申请日：2022-09-22

Applicant: Apple Inc.

Inventor： Andrea Acquas ,  Angelo Bassi ,  Federico Rossini ,  Nicola Rasera

IPC: H02M3/158 ,  H02M1/00 ,  H03L7/089

CPC classification number: H02M3/158 ,  H02M1/0009 ,  H03L7/0891

Abstract: A phase-locked loop (PLL)-based power converter is disclosed. A power converter includes a switch circuit having a switch node coupled to a regulated power supply node via an inductor and configured to source a supply current to the regulated power supply node using one or more control signals. A control circuit performs a phase-frequency comparison of a reference clock signal and a switching frequency of the switch circuit and generate a control voltage using results of the phase-frequency comparison. The control circuit further generates a control current using the control voltage, a voltage of the regulated power supply node, and a duty cycle of the switch circuit, and a demand current using the voltage level of the regulated power supply node and a reference voltage. Using the demand current, the control current, and a sensed version of the supply current, the control circuit generates the one or more control signals.