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公开(公告)号：US20180226788A1
公开(公告)日：2018-08-09
申请号：US15428535
申请日：2017-02-09
申请人： ANALOG DEVICES, INC.
IPC分类号： H02H7/20 , H01L23/528 , H01L27/02 , H01L27/092
CPC分类号： H02H7/205 , H01L23/5286 , H01L27/0248 , H01L27/0262 , H01L27/0921
摘要： Distributed switches to suppress transient electrical overstress-induced latch-up are provided. In certain configurations, an integrated circuit (IC) or semiconductor chip includes a transient electrical overstress detection circuit that activates a transient overstress detection signal in response to detecting a transient electrical overstress event between a pair of power rails. The IC further includes mixed-signal circuits and latch-up suppression switches distributed across the IC, and the latch-up suppression switches temporarily clamp the power rails to one another in response to activation of the transient overstress detection signal to inhibit latch-up of the mixed-signal circuits.
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公开(公告)号：US20210098614A1
公开(公告)日：2021-04-01
申请号：US16719490
申请日：2019-12-18
申请人： Analog Devices, Inc.
发明人： Javier A. Salcedo , Linfeng He
摘要： Electrical overstress protection for electronic systems subject to electromagnetic compatibility fault conditions are provided herein. In certain implementations, a stacked thyristor protection structure with a high holding voltage includes a protection device having a trigger voltage and a holding voltage. A trigger voltage of the stacked thyristor protection structure is substantially equal to the trigger voltage of the protection device. The stacked thyristor protection structure further includes at least one resistive thyristor electrically connected to the protection device and operable to increase a holding voltage of the stacked thyristor protection structure relative to the holding voltage of the protection device. The at least one resistive thyristor comprising a PNP bipolar transistor and a NPN bipolar transistor that are cross-coupled, and a conductor connecting a collector of the PNP bipolar transistor to a collector of the NPN bipolar transistor.
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3.发明授权公开(公告)号：US10608431B2
公开(公告)日：2020-03-31
申请号：US15794394
申请日：2017-10-26
申请人： ANALOG DEVICES, INC.
摘要： Electrical overstress protection via silicon controlled rectifier (SCR) trigger amplification control is provided. In certain configurations, an overstress protection circuit includes a control circuit for detecting presence of an overstress event between a first pad and a second pad of an interface, and a discharge circuit electrically connected between the first pad and the second pad and selectively activated by the control circuit. The interface corresponds to an electronic interface of an integrated circuit (IC), a System on a Chip (SoC), or System in-a-Package (SiP). The discharge circuit includes a first smaller SCR and a second larger SCR. In response to detecting an overstress event, the control circuit activates the smaller SCR, which in turn activates the larger SCR to provide clamping between the first pad and the second pad.
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公开(公告)号：US10249609B2
公开(公告)日：2019-04-02
申请号：US15674218
申请日：2017-08-10
申请人： ANALOG DEVICES, INC.
IPC分类号： H01L29/74 , H01L31/111 , H01L27/02 , H01L29/40 , H01L29/06
摘要： An integrated circuit device for protecting circuits from transient electrical events is disclosed. An integrated circuit device includes a first bipolar junction transistor (BJT) and a second BJT cross-coupled with the first BJT to operate as a first semiconductor-controlled rectifier (SCR), where a base of the first BJT is connected to a collector of the second BJT, and a base of the second BJT is connected to an emitter or a collector of the first BJT. The integrated circuit device additionally includes a triggering device comprising a first diode having a cathode electrically connected to the base of the first BJT. The integrated circuit device further includes a third BJT cross-coupled with the second BJT to operate as a second SCR, where the third BJT has a collector connected to the base of the second BJT and a base connected to the collector of the second BJT.
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5.发明申请公开(公告)号：US20200381417A1
公开(公告)日：2020-12-03
申请号：US16700989
申请日：2019-12-02
申请人： Analog Devices, Inc.
发明人： Javier A. Salcedo , Linfeng He
摘要： A semiconductor die with high-voltage tolerant electrical overstress circuit architecture is disclosed. One embodiment of the semiconductor die includes a signal pad, a ground pad, a core circuit electrically connected to the signal pad, and a stacked thyristor protection device. The stacked thyristor includes a first thyristor and a resistive thyristor electrically connected in a stack between the signal pad and the ground pad, which enhances the holding voltage of the circuit relatively to an implementation with only the thyristor. Further, the resistive thyristor includes a PNP bipolar transistor and a NPN bipolar transistor that are cross-coupled, and an electrical connection between a collector of the PNP bipolar transistor and a collector of the NPN bipolar transistor. This allows the resistive thyristor to exhibit both thyristor characteristics and resistive characteristics based on a level of current flow.
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公开(公告)号：US10404059B2
公开(公告)日：2019-09-03
申请号：US15428535
申请日：2017-02-09
申请人： ANALOG DEVICES, INC.
IPC分类号： H02H7/20 , H01L23/528 , H01L27/02 , H01L27/092
摘要： Distributed switches to suppress transient electrical overstress-induced latch-up are provided. In certain configurations, an integrated circuit (IC) or semiconductor chip includes a transient electrical overstress detection circuit that activates a transient overstress detection signal in response to detecting a transient electrical overstress event between a pair of power rails. The IC further includes mixed-signal circuits and latch-up suppression switches distributed across the IC, and the latch-up suppression switches temporarily clamp the power rails to one another in response to activation of the transient overstress detection signal to inhibit latch-up of the mixed-signal circuits.
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公开(公告)号：US20190051646A1
公开(公告)日：2019-02-14
申请号：US15674218
申请日：2017-08-10
申请人： ANALOG DEVICES, INC.
摘要： An integrated circuit device for protecting circuits from transient electrical events is disclosed. An integrated circuit device includes a first bipolar junction transistor (BJT) and a second BJT cross-coupled with the first BJT to operate as a first semiconductor-controlled rectifier (SCR), where a base of the first BJT is connected to a collector of the second BJT, and a base of the second BJT is connected to an emitter or a collector of the first BJT. The integrated circuit device additionally includes a triggering device comprising a first diode having a cathode electrically connected to the base of the first BJT. The integrated circuit device further includes a third BJT cross-coupled with the second BJT to operate as a second SCR, where the third BJT has a collector connected to the base of the second BJT and a base connected to the collector of the second BJT.
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公开(公告)号：US11362203B2
公开(公告)日：2022-06-14
申请号：US16719490
申请日：2019-12-18
申请人： Analog Devices, Inc.
发明人： Javier A. Salcedo , Linfeng He
摘要： Electrical overstress protection for electronic systems subject to electromagnetic compatibility fault conditions are provided herein. In certain implementations, a stacked thyristor protection structure with a high holding voltage includes a protection device having a trigger voltage and a holding voltage. A trigger voltage of the stacked thyristor protection structure is substantially equal to the trigger voltage of the protection device. The stacked thyristor protection structure further includes at least one resistive thyristor electrically connected to the protection device and operable to increase a holding voltage of the stacked thyristor protection structure relative to the holding voltage of the protection device. The at least one resistive thyristor comprising a PNP bipolar transistor and a NPN bipolar transistor that are cross-coupled, and a conductor connecting a collector of the PNP bipolar transistor to a collector of the NPN bipolar transistor.
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公开(公告)号：US11342323B2
公开(公告)日：2022-05-24
申请号：US16700989
申请日：2019-12-02
申请人： Analog Devices, Inc.
发明人： Javier A. Salcedo , Linfeng He
摘要： A semiconductor die with high-voltage tolerant electrical overstress circuit architecture is disclosed. One embodiment of the semiconductor die includes a signal pad, a ground pad, a core circuit electrically connected to the signal pad, and a stacked thyristor protection device. The stacked thyristor includes a first thyristor and a resistive thyristor electrically connected in a stack between the signal pad and the ground pad, which enhances the holding voltage of the circuit relatively to an implementation with only the thyristor. Further, the resistive thyristor includes a PNP bipolar transistor and a NPN bipolar transistor that are cross-coupled, and an electrical connection between a collector of the PNP bipolar transistor and a collector of the NPN bipolar transistor. This allows the resistive thyristor to exhibit both thyristor characteristics and resistive characteristics based on a level of current flow.
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10.发明申请公开(公告)号：US20190131787A1
公开(公告)日：2019-05-02
申请号：US15794394
申请日：2017-10-26
申请人： ANALOG DEVICES, INC.
IPC分类号： H02H9/04 , H01L27/02 , H01L29/74 , H01L23/528
摘要： Electrical overstress protection via silicon controlled rectifier (SCR) trigger amplification control is provided. In certain configurations, an overstress protection circuit includes a control circuit for detecting presence of an overstress event between a first pad and a second pad of an interface, and a discharge circuit electrically connected between the first pad and the second pad and selectively activated by the control circuit. The interface corresponds to an electronic interface of an integrated circuit (IC), a System on a Chip (SoC), or System in-a-Package (SiP). The discharge circuit includes a first smaller SCR and a second larger SCR. In response to detecting an overstress event, the control circuit activates the smaller SCR, which in turn activates the larger SCR to provide clamping between the first pad and the second pad.
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