Multiple port emulation
    1.
    发明授权

    公开(公告)号:US12093706B2

    公开(公告)日:2024-09-17

    申请号:US18186748

    申请日:2023-03-20

    Abstract: Multiple independent endpoint devices can be emulated using a single system on chip (SoC) device. Such a SoC can have multiple cores that can emulate ports according to a specified protocol, such as the peripheral component interconnect express (PCIe) protocol useful for data communications. An emulation agent can manage various aspects of these emulated endpoint devices in software, including serving interrupts for relevant emulated devices according to a determined priority scheme. Interrupts can be registered for each device, and data structures allocated dynamically for a determined number and type(s) of PCIe endpoint devices to be emulated. Each PCIe core on the SoC can function as a separate PCIe endpoint device endpoint for communicating with one or more hosts or other such devices.

    MULTIPLE PORT EMULATION
    2.
    发明公开

    公开(公告)号:US20230221971A1

    公开(公告)日:2023-07-13

    申请号:US18186748

    申请日:2023-03-20

    CPC classification number: G06F13/4221 G06F13/24 G06F13/105

    Abstract: Multiple independent endpoint devices can be emulated using a single system on chip (SoC) device. Such a SoC can have multiple cores that can emulate ports according to a specified protocol, such as the peripheral component interconnect express (PCIe) protocol useful for data communications. An emulation agent can manage various aspects of these emulated endpoint devices in software, including serving interrupts for relevant emulated devices according to a determined priority scheme. Interrupts can be registered for each device, and data structures allocated dynamically for a determined number and type(s) of PCIe endpoint devices to be emulated. Each PCIe core on the SoC can function as a separate PCIe endpoint device endpoint for communicating with one or more hosts or other such devices.

    Multiple port emulation
    3.
    发明授权

    公开(公告)号:US11650835B1

    公开(公告)日:2023-05-16

    申请号:US16836527

    申请日:2020-03-31

    CPC classification number: G06F9/455 G06F13/4282 G06F2213/0026

    Abstract: Multiple independent endpoint devices can be emulated using a single system on chip (SoC) device. Such a SoC can have multiple cores that can emulate ports according to a specified protocol, such as the peripheral component interconnect express (PCIe) protocol useful for data communications. An emulation agent can manage various aspects of these emulated endpoint devices in software, including serving interrupts for relevant emulated devices according to a determined priority scheme. Interrupts can be registered for each device, and data structures allocated dynamically for a determined number and type(s) of PCIe endpoint devices to be emulated. Each PCIe core on the SoC can function as a separate PCIe endpoint device endpoint for communicating with one or more hosts or other such devices.

    Secure boot of an integrated circuit

    公开(公告)号:US11520891B1

    公开(公告)日:2022-12-06

    申请号:US16710487

    申请日:2019-12-11

    Abstract: A computer chip, such as an System on chip (SOC), can receive firmware updates having two separate signatures; a first of the signatures is used to authenticate the firmware using a processor within the computer chip, and a second of the signatures is used by a controller, separate from the processor. A first key, used by the processor to authenticate the firmware, can be a boot key that is hardwired in the computer chip. A second key, used by the controller, can be a key that is provided to the controller at any time and is updatable. The controller can suspend the processor so that the controller can perform a first authentication of the firmware using the second signature and the second key. If the authentication is successful, the controller can release the processor, which then uses the first key and the first signature to perform a second authentication.

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