公开(公告)号：US11631734B2

公开(公告)日：2023-04-18

申请号：US17102258

申请日：2020-11-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang Liu ,  Huang-Hsien Chang ,  Tsung-Tang Tsai ,  Hung-Jung Tu

IPC: H01L49/02 ,  H01L21/02 ,  H01L23/522 ,  H01L21/308 ,  H01L21/3105 ,  H01L21/285

Abstract: A vertical capacitor structure includes a substrate, at least a pillar, a first conductive layer, a first dielectric layer and a second conductive layer. The substrate defines a cavity. The pillar is disposed in the cavity. The first conductive layer covers and is conformal to the cavity of the substrate and the pillar, and is insulated from the substrate. The first dielectric layer covers and is conformal to the first conductive layer. The second conductive layer covers and is conformal to the first dielectric layer. The first conductive layer, the first dielectric layer and the second conductive layer jointly form a capacitor component.

公开(公告)号：US11894340B2

公开(公告)日：2024-02-06

申请号：US16685899

申请日：2019-11-15

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang Liu ,  Min Lung Huang ,  Huang-Hsien Chang ,  Tsung-Tang Tsai ,  Ching-Ju Chen

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/16 ,  H01L23/00 ,  H01L21/78 ,  H01L25/00 ,  H01L23/498

CPC classification number: H01L25/0652 ,  H01L21/78 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/562 ,  H01L25/50

Abstract: A package structure includes a wiring structure and a first electronic device. The wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The first electronic device is electrically connected to the wiring structure, and has a first surface, a second surface and at least one lateral side surface extending between the first surface and the second surface. The first electronic device includes a first active circuit region and a first protrusion portion. The first protrusion portion protrudes from the at least one lateral side surface of the first electronic device. A portion of the first active circuit region is disposed in the first protrusion portion.

公开(公告)号：US12040261B2

公开(公告)日：2024-07-16

申请号：US17707801

申请日：2022-03-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang Liu ,  Tsung-Tang Tsai ,  Huang-Hsien Chang ,  Ching-Ju Chen

IPC: H05K1/02 ,  H01L21/48 ,  H01L23/00 ,  H01L23/13 ,  H01L23/498 ,  H05K1/11

CPC classification number: H01L23/49816 ,  H01L21/4853 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2224/16238

Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.

公开(公告)号：US11733294B2

公开(公告)日：2023-08-22

申请号：US16812232

申请日：2020-03-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chen-Chao Wang ,  Tsung-Tang Tsai ,  Chih-Yi Huang

IPC: H01L23/498 ,  G01R31/28 ,  H01L23/538 ,  H01L23/552 ,  H01L25/18 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31

CPC classification number: G01R31/2896 ,  H01L23/49822 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/552 ,  H01L24/16 ,  H01L25/18 ,  H01L21/563 ,  H01L23/3185 ,  H01L23/3192 ,  H01L2224/16227

Abstract: A package structure and a testing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The wiring structure includes at least one dielectric layer, at least one conductive circuit layer in contact with the dielectric layer, and at least one test circuit structure in contact with the dielectric layer. The test circuit structure is disposed adjacent to the interconnection portion of the conductive circuit layer. The first electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the interconnection portion of the conductive circuit layer.

公开(公告)号：US12216157B2

公开(公告)日：2025-02-04

申请号：US18236930

申请日：2023-08-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chen-Chao Wang ,  Tsung-Tang Tsai ,  Chih-Yi Huang

IPC: H01L23/498 ,  G01R31/28 ,  H01L23/00 ,  H01L23/538 ,  H01L23/552 ,  H01L25/18 ,  H01L21/56 ,  H01L23/31

Abstract: A package structure and a testing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The wiring structure includes at least one dielectric layer, at least one conductive circuit layer in contact with the dielectric layer, and at least one test circuit structure in contact with the dielectric layer. The test circuit structure is disposed adjacent to the interconnection portion of the conductive circuit layer. The first electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the interconnection portion of the conductive circuit layer.

公开(公告)号：US11728282B2

公开(公告)日：2023-08-15

申请号：US16656331

申请日：2019-10-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang Liu ,  Min Lung Huang ,  Huang-Hsien Chang ,  Tsung-Tang Tsai ,  Ching-Ju Chen

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/562 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/4871 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/3675 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/3512

Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.

公开(公告)号：US11289411B2

公开(公告)日：2022-03-29

申请号：US16942579

申请日：2020-07-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang Liu ,  Tsung-Tang Tsai ,  Huang-Hsien Chang ,  Ching-Ju Chen

IPC: H05K1/02 ,  H05K1/11 ,  H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/13

Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.

公开(公告)号：US11428946B2

公开(公告)日：2022-08-30

申请号：US16872052

申请日：2020-05-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yuan-Feng Chiang ,  Tsung-Tang Tsai ,  Min Lung Huang

IPC: G02B27/30 ,  G02B5/00 ,  G02B19/00

Abstract: According to various embodiments, a collimator includes a substrate defining a plurality of channels through the substrate. The substrate includes a first surface and a second surface opposite the first surface. Each of the channels includes a first aperture exposed from the first surface, a second aperture between the first surface and the second surface, and a third aperture exposed from the second surface. The first aperture and the third aperture are larger than the second aperture.

公开(公告)号：US11257742B2

公开(公告)日：2022-02-22

申请号：US16919967

申请日：2020-07-02

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang Liu ,  Tsung-Tang Tsai

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H01L23/498 ,  H01L21/48 ,  H05K1/14

Abstract: A wiring structure includes a conductive structure and at least one conductive through via. The conductive structure includes a plurality of dielectric layers, a plurality of circuit layers in contact with the dielectric layers, and a plurality of dam portions in contact with the dielectric layers. The dam portions are stacked on and contact one another. The conductive through via extends through the dam portions.

公开(公告)号：US10741483B1

公开(公告)日：2020-08-11

申请号：US16774161

申请日：2020-01-28

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang Liu ,  Tsung-Tang Tsai ,  Huang-Hsien Chang ,  Ching-Ju Chen

IPC: H05K1/02 ,  H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/13

Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.