公开(公告)号：US20220216136A1

公开(公告)日：2022-07-07

申请号：US17142198

申请日：2021-01-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Po-Jen CHENG ,  Chien-Fan CHEN

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L23/538 ,  H01L25/18 ,  H01L21/48 ,  H01L21/56

Abstract: An electronic device package and a method for manufacturing the same are provided. The electronic device package includes a circuit layer and an electronic component. The circuit layer includes a dielectric layer having an opening, and an electrical contact. A width of an aperture of the opening increases from a first surface toward a second surface. The electrical contact is at least partially disposed in the opening and exposed through the opening. The electronic component is disposed on the second surface and electrically connected to the circuit layer.

公开(公告)号：US20230124933A1

公开(公告)日：2023-04-20

申请号：US17501952

申请日：2021-10-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei-Jen WANG ,  Po-Jen CHENG ,  Fu-Yuan CHEN

IPC: H01L23/538 ,  H01L25/065 ,  H01L21/48

Abstract: An electronic package structure includes an electronic structure, a wiring structure, an electrical contact and a support layer. The wiring structure is located over the electronic structure. The electrical contact connects the wiring structure and the electronic structure. The support layer is disposed around the electrical contact and has a surface facing the electrical contact. The surface includes at least one inflection point in a cross-sectional view.

公开(公告)号：US20230260957A1

公开(公告)日：2023-08-17

申请号：US17670320

申请日：2022-02-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Po-Jen CHENG ,  Wei-Jen WANG ,  Fu-Yuan CHEN

IPC: H01L23/00 ,  H01L23/498

CPC classification number: H01L24/81 ,  H01L23/49822 ,  H01L24/29 ,  H01L2224/29006 ,  H01L2224/81379

Abstract: An electronic structure includes a packaging structure, a circuit pattern structure, an underfill and a protrusion structure. The circuit pattern structure is disposed over the packaging structure. A gap is between the circuit pattern structure and the packaging structure. The underfill is disposed in the gap. The protrusion structure is disposed in the gap, and is configured to facilitate the distributing of the underfill in the gap.

公开(公告)号：US20230124000A1

公开(公告)日：2023-04-20

申请号：US17501953

申请日：2021-10-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei-Jen WANG ,  Po-Jen CHENG ,  Fu-Yuan CHEN ,  Yi-Hsin CHENG

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/538

Abstract: At least some embodiments of the present disclosure relate to an electronic package structure. The electronic package structure includes an electronic structure, a wiring structure disposed over the electronic structure, a bonding element connecting the wiring structure and the electronic structure, and a reinforcement element attached to the wiring structure. An elevation difference between a highest point and a lowest point of a surface of the wiring structure facing the electronic structure is less than a height of the bonding element.

公开(公告)号：US20230187367A1

公开(公告)日：2023-06-15

申请号：US17548328

申请日：2021-12-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei-Jen WANG ,  Po-Jen CHENG ,  Fu-Yuan CHEN ,  Kao Hsin CHEN

IPC: H01L23/538 ,  H01L23/00

CPC classification number: H01L23/5386 ,  H01L23/5384 ,  H01L24/14

Abstract: An electronic package structure includes a lower circuit pattern structure, an upper circuit pattern structure, a reflowable material and at least one core element. The upper circuit pattern structure is disposed above the lower circuit pattern structure. The reflowable material is disposed between the upper circuit pattern structure and the lower circuit pattern structure. The core element attaches to the reflowable material and is configured to inhibit displacement of the at least one core element during a reflow process.

公开(公告)号：US20220068840A1

公开(公告)日：2022-03-03

申请号：US17006672

申请日：2020-08-28

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Po-Jen CHENG ,  Po-Hsiang WANG ,  Fu-Yuan CHEN ,  Wei-Jen WANG

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor device package and manufacturing method thereof are provided. The semiconductor device package includes a first conductive structure, a second conductive structure, a connection element, a conductive member, an encapsulant and a binding layer. The first conductive structure includes a first circuit layer. The second conductive structure is disposed over the first conductive structure. The connection element is disposed on and electrically connected to the first circuit layer. The conductive member protrudes from the second conductive structure. The encapsulant is disposed between the first conductive structure and the second conductive structure. The binding layer is disposed between the second conductive structure and the encapsulant.