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公开(公告)号：US20240330076A1
公开(公告)日：2024-10-03
申请号：US18190521
申请日：2023-03-27
Applicant: Advanced Micro Devices, Inc.
Inventor： Jerry Anton Ahrens , William Robert Alverson , Joshua Taylor Knight , Amitabh Mehra , Anil Harwani , Grant Evan Ley
IPC: G06F9/50
CPC classification number: G06F9/5094 , G06F9/5016 , G06F9/5033
Abstract: Task allocation with chipset attached memory and additional processing unit is described. In accordance with the described techniques, a computing device includes a main system and one or more sub-systems which are coupled to the main system via a chipset link. The main system includes at least a processing unit and a system memory. The one or more sub-systems each include at least a chipset attached processing unit and a chipset attached memory. Contents of the system memory are transferable to the chipset attached memory of the sub-system via the chipset link to enable the chipset attached processing unit to perform the one or more tasks using the contents from the chipset attached memory.
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公开(公告)号：US20240211142A1
公开(公告)日：2024-06-27
申请号：US18146538
申请日：2022-12-27
Applicant: Advanced Micro Devices, Inc.
Inventor： Alicia Wen Ju Yurie Leong , Jayesh Hari Joshi , William Robert Alverson , Joshua Taylor Knight , Jerry Anton Ahrens , Amitabh Mehra , Grant Evan Ley
IPC: G06F3/06
CPC classification number: G06F3/0613 , G06F3/0634 , G06F3/0673
Abstract: Extended training for memory is described. In accordance with the described techniques, a training request to train a memory with extended training is received. The extended training corresponds to a longer amount of time than a default training. The extended training of the memory is performed using a set of target memory settings. In one or more implementations, the extended training is performed during a boot up phase of the computing device.
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公开(公告)号：US12008401B2
公开(公告)日：2024-06-11
申请号：US16723427
申请日：2019-12-20
Applicant: ADVANCED MICRO DEVICES, INC.
Inventor： Anil Harwani , Amitabh Mehra , William R. Alverson , Grant E. Ley , Jerry A. Ahrens , Kenneth Mitchell
CPC classification number: G06F9/5005 , G06F3/065 , G06F3/0656 , G06F9/48 , G06F9/50 , G06F9/5027 , G06F9/54 , G06F9/544 , G06F11/3024 , G06F11/3433
Abstract: Automatic central processing unit (CPU) usage optimization includes: monitoring performance activity of a workload comprising a plurality of threads; and modifying a resource allocation of a plurality of cores for the plurality of threads based on the performance activity.
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4.发明授权公开(公告)号：US11835998B2
公开(公告)日：2023-12-05
申请号：US17362231
申请日：2021-06-29
Applicant: Advanced Micro Devices, Inc.
Inventor： Amitabh Mehra , Jerry A. Ahrens , Anil Harwani , Richard Martin Born , Dirk J. Robinson , William R. Alverson , Joshua Taylor Knight
CPC classification number: G06F1/08 , G06F1/28 , H03K5/00006
Abstract: Methods and apparatuses control the clock rate of a processing unit. The methods and apparatus control the clock rate by generating an output clock rate based on the determined frequency adjustment such that the processing unit maintains the overclocking. The methods include: receiving an analog voltage supply in response to detecting overclocking in the processing unit; dynamically sensing measurements of an output voltage from a voltage generator based on the received analog voltage supply; determining characteristics of a voltage droop in the output voltage based on the dynamically sensed output voltage measurements; determining a frequency adjustment for the clock rate of the processing unit based on the determined characteristics of the voltage droop; and generating an output clock rate based on the determined frequency adjustment such that the processing unit maintains the overclocking.
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公开(公告)号：US20230350715A1
公开(公告)日：2023-11-02
申请号：US17732987
申请日：2022-04-29
Applicant: Advanced Micro Devices, Inc.
Inventor： Joshua Taylor Knight , Jayesh Hari Joshi , Anil Harwani , Grant Evan Ley , Jerry Anton Ahrens , William Robert Alverson , Amitabh Mehra
CPC classification number: G06F9/5016 , G06F9/505 , G06F9/5044 , G06F11/3409
Abstract: Various timing parameter values for a memory system are changed and a workload is run using the changed timing parameter values resulting in workload performance values. The workload is run multiple times with different timing parameter values and the performance values generated by the workload are used to generate and output a performance indication that identifies how sensitive performance of the physical memory is to the one or more timing parameters. The parameter values generated by the workload are optionally used to predict what parameter value the workload would have generated for user selected timing parameter values (e.g., without running the workload).
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Patent Agency Ranking
公开(公告)号：US20230324947A1
公开(公告)日：2023-10-12
申请号：US17704684
申请日：2022-03-25
Applicant: Advanced Micro Devices, Inc.
Inventor： Amitabh Mehra , William Robert Alverson , Jerry Anton Ahrens , Grant Evan Ley , Anil Harwani , Joshua Taylor Knight
IPC: G06F1/3296 , G06F1/20 , G06F1/324 , G06F1/30 , G06F1/08
CPC classification number: G06F1/08 , G06F1/206 , G06F1/305 , G06F1/324 , G06F1/3296
Abstract: User configurable hardware settings for overclocking is described. In accordance with the described techniques, user input to adjust hardware settings for operating a processing unit in an overclocking mode is received. The user input, for example, adjusts at least one of a voltage droop threshold or a frequency adjustment of the clock rate. A voltage droop is detected while operating the processing unit in the overclocking mode. Responsive to detecting the voltage droop, a clock rate of the processing unit is adjusted based at least in part on the adjusted hardware settings.
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7.发明申请公开(公告)号：US20220413543A1
公开(公告)日：2022-12-29
申请号：US17362231
申请日：2021-06-29
Applicant: Advanced Micro Devices, Inc.
Inventor： Amitabh Mehra , Jerry A. Ahrens , Anil Harwani , Richard Martin Born , Dirk J. Robinson , William R. Alverson , Joshua Taylor Knight
Abstract: Methods and apparatuses control the clock rate of a processing unit. The methods and apparatus control the clock rate by generating an output clock rate based on the determined frequency adjustment such that the processing unit maintains the overclocking. The methods include: receiving an analog voltage supply in response to detecting overclocking in the processing unit; dynamically sensing measurements of an output voltage from a voltage generator based on the received analog voltage supply; determining characteristics of a voltage droop in the output voltage based on the dynamically sensed output voltage measurements; determining a frequency adjustment for the clock rate of the processing unit based on the determined characteristics of the voltage droop; and generating an output clock rate based on the determined frequency adjustment such that the processing unit maintains the overclocking.
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公开(公告)号：US20240319903A1
公开(公告)日：2024-09-26
申请号：US18187900
申请日：2023-03-22
Applicant: Advanced Micro Devices, Inc.
Inventor： William Robert Alverson , Jerry Anton Ahrens , Anil Harwani , Joshua Taylor Knight , Grant Evan Ley , Amitabh Mehra
IPC: G06F3/06
CPC classification number: G06F3/065 , G06F3/0619 , G06F3/0631 , G06F3/0683
Abstract: Duplicating memory content with chipset attached memory is described. In accordance with the described techniques, contents of a system memory are duplicated on a chipset attached memory over a chipset link. Memory requests are serviced using the contents of the system memory and the contents on the chipset attached memory. Servicing the memory requests includes servicing a first portion of a read request using the contents of the system memory and a second, remaining portion of the read request using the contents on the chipset attached memory. Servicing the memory requests further includes communicating a write request to the system memory and to the chipset attached memory.
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公开(公告)号：US12038779B2
公开(公告)日：2024-07-16
申请号：US17704684
申请日：2022-03-25
Applicant: Advanced Micro Devices, Inc.
Inventor： Amitabh Mehra , William Robert Alverson , Jerry Anton Ahrens , Grant Evan Ley , Anil Harwani , Joshua Taylor Knight
CPC classification number: G06F1/08 , G06F1/206 , G06F1/305 , G06F1/324 , G06F1/3296
Abstract: User configurable hardware settings for overclocking is described. In accordance with the described techniques, user input to adjust hardware settings for operating a processing unit in an overclocking mode is received. The user input, for example, adjusts at least one of a voltage droop threshold or a frequency adjustment of the clock rate. A voltage droop is detected while operating the processing unit in the overclocking mode. Responsive to detecting the voltage droop, a clock rate of the processing unit is adjusted based at least in part on the adjusted hardware settings.
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公开(公告)号：US20240211160A1
公开(公告)日：2024-06-27
申请号：US18146929
申请日：2022-12-27
Applicant: Advanced Micro Devices, Inc.
Inventor： Jerry Anton Ahrens , William Robert Alverson , Joshua Taylor Knight , Amitabh Mehra , Anil Harwani , Grant Evan Ley
IPC: G06F3/06
CPC classification number: G06F3/0647 , G06F3/061 , G06F3/0658 , G06F3/0673 , G06F3/0683
Abstract: System memory training with chipset attached memory is described. In accordance with the described techniques, a request is received to train a system memory of a device. Responsive to the request, contents of the system memory are transferred to a chipset attached memory. The device is operated using the contents from the chipset attached memory. While the device is being operated using the contents from the chipset attached memory, the system memory is dynamically trained. After the training is complete, the contents are transferred back from the chipset attached memory to the trained system memory.
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