公开(公告)号：US11424596B2

公开(公告)日：2022-08-23

申请号：US17135896

申请日：2020-12-28

申请人： OTTO-VON-GUERICKE-UNIVERSITAET MAGDEBURG ,  AZUR SPACE SOLAR POWER GMBH

发明人： Armin Dadgar ,  André Strittmatter

IPC分类号： H01S5/00 ,  H01S5/30 ,  H01S5/22

摘要： A semiconductor layer stack, a component made therefrom, a component module, and a production method is provided. The semiconductor layer stack has at least two layers (A, B), which, as individual layers, each have an energy position of the Fermi level in the semiconductor band gap, E F - E V

公开(公告)号：US11870220B2

公开(公告)日：2024-01-09

申请号：US17868447

申请日：2022-07-19

申请人： OTTO-VON-GUERICKE-UNIVERSITAET MAGDEBURG ,  AZUR SPACE SOLAR POWER GMBH

发明人： Armin Dadgar ,  André Strittmatter

IPC分类号： H01S5/00 ,  H01S5/30 ,  H01S5/22

CPC分类号： H01S5/3068 ,  H01S5/2227 ,  H01S5/3063 ,  H01S5/3077 ,  H01S5/3054

摘要： A semiconductor layer stack, a component made therefrom, a component module, and a production method is provided. The semiconductor layer stack has at least two layers (A, B), which, as individual layers, each have an energy position of the Fermi level in the semiconductor band gap,






E
F

-

E
V

公开(公告)号：US12125938B2

公开(公告)日：2024-10-22

申请号：US15201576

申请日：2016-07-04

申请人： AZUR SPACE Solar Power GmbH

发明人： Armin Dadgar ,  Alois Krost

IPC分类号： H01L33/00 ,  H01L21/02 ,  H01L33/06 ,  H01L33/24 ,  H01L33/32

CPC分类号： H01L33/007 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L33/0093 ,  H01L33/06 ,  H01L33/24 ,  H01L33/32

摘要： A process for the production of a layer structure of a nitride semiconductor component on a silicon surface, comprising:



provision of a substrate having a silicon surface;
deposition of an aluminium-containing nitride nucleation layer on the silicon surface of the substrate;
optional: deposition of an aluminium-containing nitride buffer layer on the nitride nucleation layer;
deposition of a masking layer on the nitride nucleation layer or, if present, on the first nitride buffer layer;
deposition of a gallium-containing first nitride semiconductor layer on the masking layer,

wherein the masking layer is deposited in such a way that, in the deposition step of the first nitride semiconductor layer, initially separate crystallites grow that coalesce above a coalescence layer thickness and occupy an average surface area of at least 0.16 μm2 in a layer plane of the coalesced nitride semiconductor layer that is perpendicular to the growth direction.