公开(公告)号：US11410977B2

公开(公告)日：2022-08-09

申请号：US16681136

申请日：2019-11-12

Applicant: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY

Inventor： John D. Brazzle ,  Frederick E. Beville ,  Yucheng Ying ,  Zafer S. Kutlu

IPC: H01L25/10 ,  H01L25/00

Abstract: An electronic module can include a first integrated device package comprising a first substrate and an electronic component mounted to the first substrate. A first vertical interconnect can be mounted to and electrically connected to the first substrate. The first vertical interconnect can extend outwardly from the first substrate. The electronic module can include a second integrated device package comprising a second substrate and a second vertical interconnect having a first end mounted to and electrically connected to the second substrate. The second vertical interconnect can have a second end electrically connected to the first vertical interconnect. The first and second vertical interconnects can be disposed between the first and second substrates.

公开(公告)号：US20200152614A1

公开(公告)日：2020-05-14

申请号：US16681136

申请日：2019-11-12

Applicant: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY

Inventor： John D. Brazzle ,  Frederick E. Beville ,  Yucheng Ying ,  Zafer S. Kutlu

IPC: H01L25/10 ,  H01L25/00

Abstract: An electronic module can include a first integrated device package comprising a first substrate and an electronic component mounted to the first substrate. A first vertical interconnect can be mounted to and electrically connected to the first substrate. The first vertical interconnect can extend outwardly from the first substrate. The electronic module can include a second integrated device package comprising a second substrate and a second vertical interconnect having a first end mounted to and electrically connected to the second substrate. The second vertical interconnect can have a second end electrically connected to the first vertical interconnect. The first and second vertical interconnects can be disposed between the first and second substrates.

公开(公告)号：US20210111084A1

公开(公告)日：2021-04-15

申请号：US17033245

申请日：2020-09-25

Applicant: Analog Devices International Unlimited Company

Inventor： John D. Brazzle ,  Frederick E. Beville ,  David R. Ng ,  Michael J. Anderson ,  Yucheng Ying

IPC: H01L23/31 ,  H01F27/29 ,  H01L21/56 ,  H01L23/367 ,  H01L23/498 ,  H01L25/16 ,  H01L25/07

Abstract: A stacked package configuration is described that includes a bottom package and an upper package. The bottom package includes a substrate having a top surface with first circuitry and metal first pads. A molded layer is then formed over the substrate. Holes through the molded layer are then laser drilled to expose the first pads. The holes and first pads align with leads of an upper package, which contains further circuit components. The holes are then partially filled with a solder paste. A thermal epoxy is applied between the molded layer and the upper package. The leads of the upper package are then inserted into the holes, and the solder paste is reflowed to electrically, thermally, and mechanically connect the upper package to the bottom package. The reflow heat also cures the epoxy. A ball grid array is then formed on the bottom of the substrate.

公开(公告)号：US11749576B2

公开(公告)日：2023-09-05

申请号：US17033245

申请日：2020-09-25

Applicant: Analog Devices International Unlimited Company

Inventor： John D. Brazzle ,  Frederick E. Beville ,  David R. Ng ,  Michael J. Anderson ,  Yucheng Ying

IPC: H01L23/48 ,  H01L23/31 ,  H01F27/29 ,  H01L21/56 ,  H01L23/367 ,  H01L23/498 ,  H01L25/16 ,  H01L25/07 ,  H01L21/48

CPC classification number: H01L23/3128 ,  H01F27/29 ,  H01L21/56 ,  H01L23/3677 ,  H01L23/49827 ,  H01L25/072 ,  H01L25/16 ,  H01L21/4853

Abstract: A stacked package configuration is described that includes a bottom package and an upper package. The bottom package includes a substrate having a top surface with first circuitry and metal first pads. A molded layer is then formed over the substrate. Holes through the molded layer are then laser drilled to expose the first pads. The holes and first pads align with leads of an upper package, which contains further circuit components. The holes are then partially filled with a solder paste. A thermal epoxy is applied between the molded layer and the upper package. The leads of the upper package are then inserted into the holes, and the solder paste is reflowed to electrically, thermally, and mechanically connect the upper package to the bottom package. The reflow heat also cures the epoxy. A ball grid array is then formed on the bottom of the substrate.

公开(公告)号：US11272618B2

公开(公告)日：2022-03-08

申请号：US16095276

申请日：2017-04-11

Applicant: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY

Inventor： John David Brazzle ,  Frederick E. Beville ,  David A. Pruitt

IPC: H05K7/00 ,  H05K1/18 ,  H01L23/498 ,  H01L23/50 ,  H05K1/02 ,  H05K3/28 ,  H05K3/34

Abstract: A component-on-package circuit may include a component for an electrical circuit and a circuit module attached to the component. The circuit module may have circuitry and at least one leadframe which connects the circuitry to the component both electrically and thermally. The leadframe may have a high degree of both electrical and thermal conductivity and a non-planar shape that provides spring-like cushioning of force applied to the component in the direction of the circuit module.