公开(公告)号：US20220188963A1

公开(公告)日：2022-06-16

申请号：US17123978

申请日：2020-12-16

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Nishank PATHAK ,  Randy Wayne RAMSEY ,  Tad LITWILLER ,  Rex Eldon MCCRARY

IPC: G06T1/20 ,  G06T15/00 ,  G06T17/10 ,  G06F1/08

Abstract: A processing system includes a graphics pipeline that executes a first shader of a first type and a second shader of a second type. In some cases, the first shader is a geometry shader and the second shader is a pixel shader. The processing system also includes buffers that hold primitives generated by the first shader and provide the primitives to the second shader. The processing system also includes a primitive hub that monitors fullness of the buffers. Launching of waves from the first shader is throttled based on the fullness of the buffers. A shader processor input (SPI) selectively throttles the waves launched by the geometry shader based on a signal from the primitive hub indicating the fullness, an indication of relative resource usage of geometry waves and pixel waves in the graphics pipeline, or an indication of lifetimes of the geometry waves.