公开(公告)号：US20020094667A1

公开(公告)日：2002-07-18

申请号：US09760885

申请日：2001-01-17

Applicant: ABB Research Ltd.

Inventor： Mietek Bakowski ,  Ulf Gustafsson ,  Heinz Lendenmann

IPC: H01L021/425

CPC classification number: H01L29/66068 ,  H01L29/1608 ,  H01L29/7722 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device of planar structure has a pn-junction (10) formed by a first layer (1) doped according to a first conductivity type, n or p, and on top thereof a second layer (2) doped according to a second conductivity type. The second layer has a higher doping concentration than the first layer and a lateral edge thereof is provided with an edge termination with second zones of said second conductivity type separated by first zones (4) of said first conductivity type arranged so that the total charge and/or the effective sheet charge density of dopants according to said second conductivity type is decreasing towards the laterally outer border (8) of the edge termination. A third layer (5) doped according to said first conductivity type is arranged on top of said second layer at least in the region of the edge termination for burying the edge termination of the device thereunder.

Abstract translation: 平面结构的半导体器件具有由根据第一导电类型n或p掺杂的第一层（1）形成的pn结（10），并且在其顶部上具有根据第二导电性掺杂的第二层（2） 类型。 第二层具有比第一层更高的掺杂浓度，并且其侧边缘设置有边缘终端，其中所述第二导电类型的第二区被所述第一导电类型的第一区（4）隔开，以使总电荷和 /或根据所述第二导电类型的掺杂剂的有效片电荷密度朝着边缘终端的横向外边界（8）减小。 根据所述第一导电类型掺杂的第三层（5）至少在边缘终端的区域中布置在所述第二层的顶部上，用于掩埋其下方的器件的边缘终端。