公开(公告)号：US08667372B2

公开(公告)日：2014-03-04

申请号：US11790669

申请日：2007-04-26

申请人： Yasufumi Honda

发明人： Yasufumi Honda

IPC分类号： G11C29/00 ,  H03M13/03

CPC分类号： G06F13/1684 ,  G06F11/1044 ,  G06F11/1666 ,  G11C5/04 ,  G11C29/42 ,  G11C29/74 ,  G11C29/846 ,  G11C2029/0409 ,  G11C2029/0411

摘要： An estimating unit estimates, when there is a request for data in a system in which an error checking unit of data is formed with a plurality of memories each of which is a dual memory having an independent address line, whether an error has occurred on the address line based on a result of an error checking for data related to the request. A control unit generates, when it is estimated that an error has occurred on the address line, error data of the data related to the request, and controls the memory in such a manner that one line of the dual memory is disabled by switching the data related to the request to generated error data.

摘要翻译： 估计单元估计当在数据的错误检查单元形成多个存储器的系统中存在数据请求时，每个存储器都是具有独立地址线的双存储器，则是否在 基于与请求相关的数据的错误检查的结果的地址行。 当估计地址线上发生错误时，控制单元产生与该请求相关的数据的错误数据，并且以这样的方式控制存储器，即通过切换数据来禁用双存储器的一行 与要求生成的错误数据有关。

公开(公告)号：US07543220B2

公开(公告)日：2009-06-02

申请号：US11237765

申请日：2005-09-29

申请人： Yasufumi Honda ,  Kenji Suzuki ,  Takashi Koguchi

发明人： Yasufumi Honda ,  Kenji Suzuki ,  Takashi Koguchi

IPC分类号： H03M13/00

CPC分类号： G06F11/1044

摘要： The present invention provides a control method for an error detection & correction apparatus, comprising a plurality of data processing apparatuses which reside in a data communications path and partake in exchanging data by the unit of error correcting code, and a plurality of information exchange paths which are installed between the plurality of data processing apparatuses; and generating a true syndrome by exchanging a partial syndrome relating to a part of the data partaken by each of the data processing apparatuses by way of the information exchange paths, comprising the step of exchanging renewal information relating to a part of the data partaken by each of the data processing apparatuses with the other data processing apparatus by way of the information exchange path.

摘要翻译： 本发明提供了一种用于错误检测和校正装置的控制方法，包括驻留在数据通信路径中的多个数据处理装置，并且通过纠错码单元交换数据，以及多个信息交换路径， 安装在所述多个数据处理装置之间; 以及通过与信息交换路径中的每一个数据处理装置所共享的数据的一部分相关的部分综合信息产生真正的综合征，其中包括以下步骤：交换与每个 的数据处理装置与其他数据处理装置通过信息交换路径。

公开(公告)号：US20060236213A1

公开(公告)日：2006-10-19

申请号：US11237765

申请日：2005-09-29

申请人： Yasufumi Honda ,  Kenji Suzuki ,  Takashi Koguchi

发明人： Yasufumi Honda ,  Kenji Suzuki ,  Takashi Koguchi

IPC分类号： H03M13/00

CPC分类号： G06F11/1044

摘要： The present invention provides a control method for an error detection & correction apparatus, comprising a plurality of data processing apparatuses which reside in a data communications path and partake in exchanging data by the unit of error correcting code, and a plurality of information exchange paths which are installed between the plurality of data processing apparatuses; and generating a true syndrome by exchanging a partial syndrome relating to a part of the data partaken by each of the data processing apparatuses by way of the information exchange paths, comprising the step of exchanging renewal information relating to a part of the data partaken by each of the data processing apparatuses with the other data processing apparatus by way of the information exchange path.

摘要翻译： 本发明提供了一种用于错误检测和校正装置的控制方法，包括驻留在数据通信路径中的多个数据处理装置，并且通过纠错码单元交换数据，以及多个信息交换路径， 安装在所述多个数据处理装置之间; 以及通过与信息交换路径中的每一个数据处理装置所共享的数据的一部分相关的部分综合信息产生真正的综合征，其中包括以下步骤：交换与每个 的数据处理装置与其他数据处理装置通过信息交换路径。

公开(公告)号：US5657297A

公开(公告)日：1997-08-12

申请号：US378972

申请日：1995-01-27

申请人： Yasufumi Honda

发明人： Yasufumi Honda

IPC分类号： G04G19/10 ,  G04G7/00 ,  G04G19/08 ,  G06F1/14 ,  G04C11/00 ,  G04B1/00 ,  G04B9/00

CPC分类号： G04G7/00 ,  G04G19/08

摘要： A clock apparatus has a first clock unit, a backup power supply unit, a second clock unit, and a control unit. The first clock unit is used to count time, and the backup power supply unit is used to supply a backup power voltage to the first clock unit, when a general power supply unit does not supply a general power voltage to the clock apparatus. The second clock unit has a higher accuracy than the first clock unit. The control unit is used to adjust the time counted by the first clock unit in accordance with a specific period counted at the second clock unit, and the control unit is also used to control the resetting of an operation of the second clock unit, when the general power supply unit starts to supply the general power voltage to the clock apparatus after the general power supply unit has been stopped. Consequently, the clock apparatus has a high accuracy corresponding to the second clock unit, and has a low consumption power when the general power supply unit cannot to supply the general power voltage to the clock apparatus, so that an improved batter backup operation for the clock apparatus can be realized.

摘要翻译： 时钟装置具有第一时钟单元，备用电源单元，第二时钟单元和控制单元。 第一时钟单元用于计数时间，并且备用电源单元用于在一般电源单元不向时钟设备提供通用电源电压时向第一时钟单元提供备用电源电压。 第二时钟单元具有比第一时钟单元更高的精度。 控制单元用于根据在第二时钟单元计数的特定周期来调整由第一时钟单元计数的时间，并且控制单元还用于控制第二时钟单元的操作的复位，当 一般电源单元停止后，一般电源单元开始向时钟装置提供一般电源电压。 因此，时钟装置具有对应于第二时钟单元的高精度，并且当一般电源单元不能向时钟装置提供一般电源电压时，具有低功耗，从而改善了对时钟的电池备份操作 装置可以实现。

公开(公告)号：US5438080A

公开(公告)日：1995-08-01

申请号：US946778

申请日：1992-09-18

申请人： Yoshifumi Ohama ,  Yoshihide Chihara ,  Yasufumi Honda ,  Yasuhiro Miyamoto

发明人： Yoshifumi Ohama ,  Yoshihide Chihara ,  Yasufumi Honda ,  Yasuhiro Miyamoto

IPC分类号： C09D5/00 ,  C08F2/46 ,  C08F299/06 ,  C08G18/63 ,  C09D4/00 ,  C09D157/00 ,  C09D175/04 ,  C09D175/14

CPC分类号： C08G18/633 ,  C08F299/06

摘要： A ultraviolet-curable coating composition is disclosed, which comprises a specific ultraviolet-curable polyfunctional (meth)acrylate, a specific urethane-curing polymer, and a specific polyisocyanate compound in a specific compounding ratio and having incorporated therein a photo stabilizer and a photopolymerization initiator. The composition provides a coating film of large thickness in one operation and is sufficiently cured even with non-uniform ultraviolet radiation and the coating film obtained from such a composition fully satisfies various requirements, such as appearance, adhesion, and weathering resistance.

摘要翻译： 公开了一种紫外线固化型涂料组合物，其包含特定的可紫外固化的多官能（甲基）丙烯酸酯，特定的聚氨酯固化聚合物和特定的多异氰酸酯化合物，其具有特定配混比，并且其中掺入光稳定剂和光聚合引发剂 。 该组合物在一次操作中提供了大厚度的涂膜，并且即使用不均匀的紫外线照射也能充分固化，并且由这种组合物获得的涂膜完全满足诸如外观，粘附性和耐候性的各种要求。

公开(公告)号：US07631244B2

公开(公告)日：2009-12-08

申请号：US11197261

申请日：2005-08-05

申请人： Kenji Suzuki ,  Yasufumi Honda ,  Takashi Koguchi

发明人： Kenji Suzuki ,  Yasufumi Honda ,  Takashi Koguchi

IPC分类号： H03M13/00 ,  G11C29/00

CPC分类号： G06F11/1044

摘要： A soft error correction method is for a memory system having memory access controllers accessing memories for storing byte-sliced data in cycle synchronism, and a system controller receiving a memory access from an arbitrary one of MPUs and issuing a memory address to the memory access controllers. When a correctable error is detected in data read from one memory, an error address where the error was detected is held within a memory access controller, and an error notification is made to the system controller from the memory access controller. In response to the error notification, the memory access controller holds the error address from the system controller without intervention from the MPUs, and reads, corrects and rewrites the data to the error address.

摘要翻译： 软错误校正方法是用于具有存储器访问控制器的存储器系统，存储器用于存储循环同步中的字节分片数据，并且系统控制器从任意一个MPU接收存储器访问并向存储器访问控制器发出存储器地址 。 当从一个存储器读取的数据中检测到可纠正的错误时，将检测到错误的错误地址保存在存储器访问控制器内，并从存储器访问控制器向系统控制器发出错误通知。 为了响应错误通知，存储器访问控制器保持来自系统控制器的错误地址，而不需要来自MPU的干预，并读取，校正和重写数据到错误地址。

公开(公告)号：US20080046631A1

公开(公告)日：2008-02-21

申请号：US11790267

申请日：2007-04-24

申请人： Kazuya Takaku ,  Yasufumi Honda ,  Kenji Suzuki

发明人： Kazuya Takaku ,  Yasufumi Honda ,  Kenji Suzuki

IPC分类号： G06F12/00

CPC分类号： G06F13/1668

摘要： To provide a technology of increasing the number of ranks of a memory module with a small change in architecture. A memory control device accessing a memory module having a plurality of ranks, includes an interface unit having selection signal lines via which to flow selection signals for selecting the ranks and address signal lines via which to flow address signals specifying addresses on the rank, and a control unit transmitting the signal for selecting the rank via part of the address signal line and via the selection signal line.

摘要翻译： 提供一种增加内存模块排名的技术，其架构的变化很小。 访问具有多个等级的存储器模块的存储器控​​制装置包括具有选择信号线的接口单元，通过该接口单元可以选择用于选择等级的选择信号和通过地址信号线流动地址信号来指定等级上的地址，以及 控制单元经由部分地址信号线并经由选择信号线发送用于选择秩的信号。

公开(公告)号：US20060212619A1

公开(公告)日：2006-09-21

申请号：US11236855

申请日：2005-09-28

申请人： Takashi Koguchi ,  Yasufumi Honda ,  Kenji Suzuki

发明人： Takashi Koguchi ,  Yasufumi Honda ,  Kenji Suzuki

IPC分类号： G06F5/00

CPC分类号： G06F11/2007

摘要： Two data communication paths (first and second data communication paths) are provided between first and second data processor devices. First and second I/O ports are provided between the first data processor device and the first data communication path. Third and fourth I/O ports are provided between the second data processor device and the second data communication path. When failure occurs in the first data communication path, the data transmitted from the first data processor device is transferred to the second data processor device through the first I/O port, a bypass communication path, the second I/O port, the second data communication path, the third I/O port, a bypass communication path, and the fourth I/O port.

摘要翻译： 在第一和第二数据处理器设备之间提供两个数据通信路径（第一和第二数据通信路径）。 第一和第二I / O端口设置在第一数据处理器设备和第一数据通信路径之间。 在第二数据处理器设备和第二数据通信路径之间提供第三和第四I / O端口。 当在第一数据通信路径中发生故障时，从第一数据处理器设备发送的数据通过第一I / O端口，旁路通信路径，第二I / O端口，第二数据被传送到第二数据处理器设备 通信路径，第三I / O端口，旁路通信路径和第四I / O端口。

公开(公告)号：US06875513B2

公开(公告)日：2005-04-05

申请号：US10365513

申请日：2003-02-13

申请人： Yasufumi Honda ,  Takehito Itoh ,  Tatsuya Ishihara ,  Masahiko Yamanaka ,  Tetsuji Mizuno

发明人： Yasufumi Honda ,  Takehito Itoh ,  Tatsuya Ishihara ,  Masahiko Yamanaka ,  Tetsuji Mizuno

IPC分类号： B05D1/36 ,  B05D7/00 ,  B05D7/14 ,  C09D133/00 ,  C09D133/14 ,  C09D143/00 ,  C09D161/28 ,  C09D163/00 ,  C09D183/04 ,  B32B27/38 ,  B05D3/02 ,  B32B27/08 ,  B32B27/30

CPC分类号： B05D7/53 ,  B05D7/577 ,  Y10T428/31511 ,  Y10T428/31663 ,  Y10T428/31938

摘要： A top coat for an outer panel of an automotive vehicle includes a clear paint formed on a base coat paint. The clear paint is constituted of acrylic resin (A) having at least one ester group containing a silicone group and at least two epoxy groups in a molecule, acrylic resin (B) having at least two epoxy groups in a molecule, and acid cross-linking agent (C) having at least two chemically blocked carboxyl groups in a molecule. The base coat paint is constituted of acrylic resin (D) having at least two hydroxyl groups in a molecule, acrylic resin (E) having at least two hydroxyl groups and at least two epoxy groups in a molecule, and melamine resin (F) having a functional group capable of reacting with a hydroxyl group.

摘要翻译： 用于机动车辆的外板的面漆包括形成在底漆涂料上的透明涂料。 透明涂料由具有至少一个含有硅酮基的酯基和分子中至少两个环氧基的丙烯酸树脂（A）构成，分子中具有至少两个环氧基的丙烯酸树脂（B） 交联剂（C）在分子中具有至少两个化学封端的羧基。 基底涂料由分子中具有至少两个羟基的丙烯酸树脂（D）构成，分子中具有至少两个羟基和至少两个环氧基的丙烯酸树脂（E）和具有至少两个环氧基的分子中的三聚氰胺树脂（F） 能够与羟基反应的官能团。

公开(公告)号：US08706945B2

公开(公告)日：2014-04-22

申请号：US11790267

申请日：2007-04-24

申请人： Kazuya Takaku ,  Yasufumi Honda ,  Kenji Suzuki

发明人： Kazuya Takaku ,  Yasufumi Honda ,  Kenji Suzuki

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F13/1668

摘要： To provide a technology of increasing the number of ranks of a memory module with a small change in architecture. A memory control device accessing a memory module having a plurality of ranks, includes an interface unit having selection signal lines via which to flow selection signals for selecting the ranks and address signal lines via which to flow address signals specifying addresses on the rank, and a control unit transmitting the signal for selecting the rank via part of the address signal line and via the selection signal line.

摘要翻译： 提供一种增加内存模块排名的技术，其架构的变化很小。 访问具有多个等级的存储器模块的存储器控​​制装置包括具有选择信号线的接口单元，通过该接口单元可以选择用于选择等级的选择信号和通过地址信号线流动地址信号来指定等级上的地址，以及 控制单元经由部分地址信号线并经由选择信号线发送用于选择秩的信号。