公开(公告)号：US08838935B2

公开(公告)日：2014-09-16

申请号：US12890585

申请日：2010-09-24

Applicant: Glenn Hinton ,  Madhavan Parthasarathy ,  Rajesh Parthasarathy ,  Muthukumar Swaminathan ,  Raj Ramanujan ,  David Zimmerman ,  Larry O. Smith ,  Adrian C. Moga ,  Scott J. Cape ,  Wayne A. Downer ,  Robert S. Chappell

Inventor： Glenn Hinton ,  Madhavan Parthasarathy ,  Rajesh Parthasarathy ,  Muthukumar Swaminathan ,  Raj Ramanujan ,  David Zimmerman ,  Larry O. Smith ,  Adrian C. Moga ,  Scott J. Cape ,  Wayne A. Downer ,  Robert S. Chappell

IPC: G06F12/00 ,  G06F12/10 ,  G06F12/02

CPC classification number: G06F12/1027 ,  G06F12/023 ,  G06F12/0292 ,  G06F12/06 ,  G06F12/1009 ,  G06F2212/1028 ,  G06F2212/1041 ,  G06F2212/151 ,  G06F2212/205 ,  G06F2212/651 ,  Y02D10/13

Abstract: In one embodiment the apparatus is a micro-page table engine that includes logic that is capable of receiving a memory page request for a page in global memory address space. The apparatus also includes a translation lookaside buffer (TLB) that is capable of storing one or more memory page address translations. Additionally, the apparatus also has a page miss handler capable of performing a micro physical address lookup in a page miss handler tag table in response to the TLB not storing the memory page address translation for the page of memory referenced by the memory page request. The apparatus also includes memory management logic that is capable of managing the page miss handler tag table entries.

Abstract translation: 在一个实施例中，该装置是微页表引擎，其包括能够接收全局存储器地址空间中的页面的存储器页面请求的逻辑。 该装置还包括能够存储一个或多个存储器页面地址转换的翻译后备缓冲器（TLB）。 此外，该设备还具有能够响应于TLB不存储由存储器寻呼请求引用的存储器页面的存储器页面地址转换而在页面未命中处理器标签表中执行微物理地址查找的页面未命中处理程序。 该装置还包括能够管理页面未命中处理程序标签表条目的存储器管理逻辑。

公开(公告)号：US07904663B2

公开(公告)日：2011-03-08

申请号：US10739694

申请日：2003-12-18

Applicant: Wayne A. Downer

Inventor： Wayne A. Downer

IPC: G06F13/14

CPC classification number: G06F12/0813

Abstract: Employing a coherency controller having a primary path and at least one secondary path to at least one interconnection network is disclosed. A method of an embodiment of the invention is performed by the coherency controller of a node. The coherency controller determines whether transactions are being properly sent to other nodes of a plurality of nodes of which the node is a part via a primary path. In response to determining that the transactions are not being properly sent to the at least one interconnection network via the primary path, the coherency controller instead sends the transactions to the other nodes via a secondary path.

Abstract translation: 公开了一种具有主路径和至少一个辅路的至少一个互连网络的一致性控制器。 本发明实施例的方法由节点的一致性控制器执行。 一致性控制器确定事务是否被正确地发送到节点是经由主路径的部分的多个节点中的其他节点。 响应于确定事务没有被正确地通过主路径正确地发送到至少一个互连网络，相关控制器通过次要路径将事务发送到其他节点。

公开(公告)号：US07194585B2

公开(公告)日：2007-03-20

申请号：US10739698

申请日：2003-12-18

Applicant: Wayne A. Downer ,  Donald R. DeSota ,  Thomas D. Lovett

Inventor： Wayne A. Downer ,  Donald R. DeSota ,  Thomas D. Lovett

IPC: G06F12/00

CPC classification number: G06F12/082 ,  G06F12/0813

Abstract: The management of transactions received by a coherency controller is disclosed. A method of an embodiment of the invention is performed by a coherency controller of a plurality of coherency controllers of a node that has a plurality of sub-nodes. The coherency controller receives a transaction from one of the sub-nodes of the node. The transaction may relate to another sub-node of the node. However, the coherency controller nevertheless processes the transaction without having to send the transaction to another coherency controller of the node, even though the sub-node from which the transaction was received is different than the sub-node to which the transaction relates. The plurality of coherency controllers is thus shared by all of the plurality of sub-nodes of the node.

Abstract translation: 披露由一致性控制器接收的事务的管理。 本发明实施例的方法由具有多个子节点的节点的多个相干性控制器的一致性控制器执行。 一致性控制器从节点的一个子节点接收事务。 该事务可以涉及节点的另一子节点。 然而，尽管接收事务的子节点与事务相关的子节点不同，但一致性控制器仍然处理该事务而不必将事务发送到该节点的另一个一致性控制器。 因此，多个相关性控制器由节点的所有多个子节点共享。

公开(公告)号：US06910108B2

公开(公告)日：2005-06-21

申请号：US10045923

申请日：2002-01-09

Applicant: Wayne A. Downer ,  Bruce M. Gilbert ,  Thomas D. Lovett

Inventor： Wayne A. Downer ,  Bruce M. Gilbert ,  Thomas D. Lovett

IPC: G06F9/50 ,  G06F12/06

CPC classification number: G06F9/54 ,  G06F2209/541

Abstract: A system and method of partitioning a multiprocessor or multinode computer system containing two or more partitions each of which contain at least three nodes or processors and a central hardware device communicating with a requestor node or processor, a target node or processor and at least one additional node or processor in the partition. The multiprocessor system architecture allows for partitioning resources to define separate subsystems capable of running different operating systems simultaneously. The method operates with the central device, a tag and address crossbar system, which transmits requests for data from the requestor node to the target node, but not to any of the additional nodes or processors which are not defined as part of a given partition. The method provides steps of assignment of definitions to physical ports with the central device corresponding with desired partitioning of resources within the system. Data processed within the system is assigned tags which themselves are related to the defined system resources allocated to one or more desired partitions within the system.

Abstract translation: 一种分割包含两个或更多个分区的多处理器或多节点计算机系统的系统和方法，每个分区包含至少三个节点或处理器以及与请求者节点或处理器通信的中央硬件设备，目标节点或处理器以及至少一个附加 分区中的节点或处理器。 多处理器系统架构允许分区资源来定义能够同时运行不同操作系统的独立子系统。 该方法与中央设备，标签和地址交叉开关系统一起工作，该系统将请求数据从请求者节点发送到目标节点，而不是任何未被定义为给定分区的一部分的附加节点或处理器。 该方法提供了将定义分配给物理端口的步骤，中央设备对应于系统内的资源的期望分区。 在系统内处理的数据被分配标签，标签本身与分配给系统内的一个或多个所需分区的定义的系统资源相关。

公开(公告)号：US06724315B2

公开(公告)日：2004-04-20

申请号：US10039776

申请日：2002-01-02

Applicant: Wayne A. Downer

Inventor： Wayne A. Downer

IPC: G08B2100

CPC classification number: H05K7/1438

Abstract: Identifying the mounting locations of sub-systems in mounting units, such as rack cabinets, is disclosed. A mounting unit has a number of sub-system mounting locations. Each of one or more sub-systems is mounted in a corresponding sub-system mounting location of the cabinet. Each of one or more active indicators has an indicator mounting position on either the mounting unit or one of the sub-systems. Each of one or more sensors has a sensor mounting position similarly on either the mounting unit or one of the sub-systems, and also detects indication from a corresponding active indicator. The active indicators and the sensors cooperatively function to identify the corresponding sub-system mounting location of each sub-system in the mounting unit.

Abstract translation: 公开了在诸如机柜之类的安装单元中识别子系统的安装位置。 安装单元具有多个子系统安装位置。 一个或多个子系统中的每一个安装在机柜的相应子系统安装位置。 一个或多个主动指示器中的每一个在安装单元或其中一个子系统上具有指示器安装位置。 一个或多个传感器中的每一个传感器安装位置类似地在安装单元或其中一个子系统上，并且还检测来自相应的有效指示器的指示。 主动指示器和传感器协同工作，以识别安装单元中每个子系统的相应子系统安装位置。

公开(公告)号：US08578130B2

公开(公告)日：2013-11-05

申请号：US10386216

申请日：2003-03-10

Applicant: Donald R. DeSota ,  Bruce M. Gilbert ,  Robert Joersz ,  Wayne A. Downer

Inventor： Donald R. DeSota ,  Bruce M. Gilbert ,  Robert Joersz ,  Wayne A. Downer

IPC: G06F9/00

CPC classification number: G06F9/468 ,  G06F9/5077

Abstract: Partitioning a node of a multi-node system into more than one partition is disclosed. First resources of the node are physically partitioned into more than one partition. The first resources physically partitioned to each partition are directly inaccessible by other partitions of the node. Second resources of the node are then internally logically partitioned into the more than one partition. Each second resource internally separates transactions of one partition from transactions of other partitions. Furthermore, the node can be dynamically repartitioned into other partitions, such as a single partition, without having to take the multi-node system down. Operating system (OS) instances of the partitions may have assumptions provided to allow for dynamic partitioning, such as quiescing the processors and/or the input/output components being reconfigured, purging remote cache entries across the entire OS, etc. Each partition may have associated therewith registers that are protected from access by other partitions.

Abstract translation: 公开了将多节点系统的节点划分为多个分区。 节点的第一个资源被物理分割成多个分区。 物理分区到每个分区的第一个资源直接不能被该节点的其他分区访问。 然后节点的第二个资源在内部逻辑上划分成多个分区。 每个第二个资源将一个分区的事务与其他分区的事务进行内部分离。 此外，节点可以被动态地重新分区成其他分区，例如单个分区，而不必使多节点系统关闭。 分区的操作系统（OS）实例可以具有提供的允许动态分区的假设，例如静止处理器和/或重新配置的输入/输出组件，在整个OS上清除远程高速缓存条目等。每个分区可以具有 与其相关联的寄存器被保护以防其他分区的访问。

公开(公告)号：US07051180B2

公开(公告)日：2006-05-23

申请号：US10045796

申请日：2002-01-09

Applicant: Wayne A. Downer ,  Bruce M. Gilbert ,  Thomas D. Lovett

Inventor： Wayne A. Downer ,  Bruce M. Gilbert ,  Thomas D. Lovett

IPC: G06F12/00

CPC classification number: G06F9/5061

Abstract: A masterless approach binds multiprocessor building blocks to partitions of a computer system using identifiers and indicators. A number of building blocks communicate among each other to determine a partition to which each building block is to be partitioned. For each unique partition to which one or more of the building blocks is to be partitioned, the building blocks communicate among each other to determine building block uniqueness, and then each of the building blocks joins the partition. The building blocks share with one another their logical port identifiers, which uniquely identify the building block within a partition. A commit indicator of each building block indicates that the building block has committed itself to the partition and that its identifiers cannot be changed. A partition protect indicator is set by one building block of a partition, preventing changes to the commit indicators of other building blocks wishing to join the partition except by that one building block, effectively protecting the partition. Building block protect indicators protect the building blocks themselves.

公开(公告)号：US06823498B2

公开(公告)日：2004-11-23

申请号：US10045926

申请日：2002-01-09

Applicant: Wayne A. Downer ,  Bruce M. Gilbert ,  Thomas D. Lovett ,  Mehul M. Shah

Inventor： Wayne A. Downer ,  Bruce M. Gilbert ,  Thomas D. Lovett ,  Mehul M. Shah

IPC: G06F945

CPC classification number: G06F9/5061

Abstract: A masterless approach for binding building blocks to partitions is disclosed. Other blocks are first sent a first physical port identifier indicating a block's physical location, and a first partition identifier indicating the block's partition. Second physical port identifiers and second partition identifiers are received from the other blocks. The first physical port identifier and the second physical port identifiers of a subset of the other blocks are then sent to the subset, the second partition identifiers of the subset being equal to the first partition identifier. The first physical port identifier and the second physical port identifiers of the subset are also received from each block of the subset. A first logical port identifier indicating the block's logical location is sent to the subset, and second logical port identifiers are received from the subset. The block joins the partition indicated by the first partition identifier.

Abstract translation: 公开了一种用于将构建块绑定到分区的无主的方法。 其他块首先被发送指示块的物理位置的第一物理端口标识符，以及指示块的分区的第一分区标识符。 从其他块接收第二物理端口标识符和第二分区标识符。 然后将其他块的子集的第一物理端口标识符和第二物理端口标识符发送到子集，子集的第二分区标识符等于第一分区标识符。 子集的第一物理端口标识符和第二物理端口标识符也从子集的每个块接收。 指示块的逻辑位置的第一逻辑端口标识符被发送到子集，并且从子集接收第二逻辑端口标识符。 该块加入由第一个分区标识符指示的分区。

公开(公告)号：US06795889B2

公开(公告)日：2004-09-21

申请号：US10045797

申请日：2002-01-09

Applicant: Thomas B. Berg ,  Wayne A. Downer ,  Thomas E. Kloos ,  Richard L. Stout

Inventor： Thomas B. Berg ,  Wayne A. Downer ,  Thomas E. Kloos ,  Richard L. Stout

IPC: G06F1200

CPC classification number: G11C7/1012 ,  G11C7/1006 ,  G11C7/1075 ,  G11C11/413 ,  G11C2207/104

Abstract: A means and method to receive and store a continuous flow of data items being processed in a data processing system in which data items are received from multiple sources simultaneously. The invention provided for simultaneous retrieval of previously stored data from multiple destinations while providing low latency of the retrieved data. The invention utilizes multi-port random access memory or register arrays with fewer ports than the number of actual data sources or data destinations within the system. The disclosure teaches a means of providing the control of data flow to multi-port simultaneous access memory systems, utilizing the control paths in the memory control systems rather than the data paths in such systems. The system eliminates or reduces the need for memory buffers to manage data flow into or out of system memory devices which have a limited number of ports or paths connecting system memory to the input and output systems of the data processing system.

Abstract translation: 一种在数据处理系统中接收和存储正在处理的数据项目的连续流的方法和方法，其中数据项目同时从多个源接收。 本发明提供了同时从多个目的地检索先前存储的数据，同时提供检索数据的低等待时间。 本发明利用具有比系统内的实际数据源或数据目的地的数量少的端口的多端口随机存取存储器或寄存器阵列。 该公开内容教导了利用存储器控制系统中的控制路径而不是这些系统中的数据路径来向多端口同时存取存储器系统提供数据流控制的手段。 该系统消除或减少了对存储器缓冲器的需要，以管理进出系统存储器件的数据流，这些存储器设备具有有限数量的端口或路径，将系统存储器连接到数据处理系统的输入和输出系统。

公开(公告)号：US20180089127A1

公开(公告)日：2018-03-29

申请号：US15279830

申请日：2016-09-29

Applicant: Mario Flajslik ,  Eric R. Borch ,  Michael A. Parker ,  Wayne A. Downer

Inventor： Mario Flajslik ,  Eric R. Borch ,  Michael A. Parker ,  Wayne A. Downer

IPC: G06F13/40

CPC classification number: G06F13/4022 ,  G06F13/4068

Abstract: Technologies for a system of communicatively coupled network switches in a hierarchical interconnect network topology include two or more groups that each include two or more first and second level switches in which each of the first level switches are communicatively coupled to each of the plurality of second level switches to form a complete bipartite graph. Additionally, each of the groups is interconnected to each of the other groups via a corresponding global link connecting a second level switch of one group to a corresponding second level switch of another group. Further, each of the first level switches are communicatively coupled to one or more computing nodes. Other embodiments are described herein.