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公开(公告)号：US20120139100A1
公开(公告)日：2012-06-07
申请号：US12959549
申请日：2010-12-03
申请人： Ward G. Fillmore , William J. Davis
发明人： Ward G. Fillmore , William J. Davis
CPC分类号： B81C1/00301 , B81B2207/092 , B81B2207/095 , H01L21/6835 , H01L23/544 , H01L2221/68359 , H01L2221/68363 , H01L2221/68381 , H01L2223/54426 , H01L2924/00013 , H01L2924/0002 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00
摘要： A package for a plurality of semiconductor devices having: an electrical interconnect structure, comprising: an electrical interconnect structure; and an active device structure, comprising the plurality of semiconductor devices on an active device substrate. The electrical interconnect structure is bonded to the active device structure and the electrical interconnect structure provides electrical interconnection among the semiconductor devices.
摘要翻译： 一种用于多个半导体器件的封装，具有：电互连结构，包括：电互连结构; 以及有源器件结构，其包括在有源器件衬底上的多个半导体器件。 电互连结构被结合到有源器件结构，并且电互连结构提供半导体器件之间的电互连。
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公开(公告)号：US08653673B2
公开(公告)日：2014-02-18
申请号：US13331408
申请日：2011-12-20
申请人： Robert B. Hallock , William J. Davis , Yiwen Zhang , Ward G. Fillmore , Susan C. Trulli , Jason G. Milne
发明人： Robert B. Hallock , William J. Davis , Yiwen Zhang , Ward G. Fillmore , Susan C. Trulli , Jason G. Milne
IPC分类号： H01L23/48
CPC分类号： H01L23/3114 , H01L21/561 , H01L23/24 , H01L23/3121 , H01L23/3135 , H01L24/05 , H01L24/13 , H01L24/48 , H01L2224/0401 , H01L2224/04042 , H01L2224/05567 , H01L2224/131 , H01L2924/00014 , H01L2924/1461 , H01L2924/014 , H01L2924/00 , H01L2224/05552 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A package and method for packaging a semiconductor device formed in a surface portion of a semiconductor wafer. The package includes: a dielectric layer disposed on the surface portion of the semiconductor wafer having a device exposing opening to expose one of the devices and an electrical contacts pad opening to expose an electrical contact pad; and a porous material in the device exposing opening over said one of the devices.
摘要翻译： 一种用于封装形成在半导体晶片的表面部分中的半导体器件的封装和方法。 所述封装包括：设置在所述半导体晶片的表面部分上的电介质层，具有暴露开口以暴露所述器件中的一个的器件和用于暴露电接触焊盘的电触点焊盘开口; 以及所述装置中的多孔材料暴露在所述装置之一上的开口。
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公开(公告)号：US20130154124A1
公开(公告)日：2013-06-20
申请号：US13331408
申请日：2011-12-20
申请人： Robert B. Hallock , William J. Davis , Yiwen Zhang , Ward G. Fillmore , Susan C. Trulli , Jason G. Milne
发明人： Robert B. Hallock , William J. Davis , Yiwen Zhang , Ward G. Fillmore , Susan C. Trulli , Jason G. Milne
CPC分类号： H01L23/3114 , H01L21/561 , H01L23/24 , H01L23/3121 , H01L23/3135 , H01L24/05 , H01L24/13 , H01L24/48 , H01L2224/0401 , H01L2224/04042 , H01L2224/05567 , H01L2224/131 , H01L2924/00014 , H01L2924/1461 , H01L2924/014 , H01L2924/00 , H01L2224/05552 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A package and method for packaging a semiconductor device formed in a surface portion of a semiconductor wafer. The package includes: a dielectric layer disposed on the surface portion of the semiconductor wafer having a device exposing opening to expose one of the devices and an electrical contacts pad opening to expose an electrical contact pad; and a porous material in the device exposing opening over said one of the devices.
摘要翻译： 一种用于封装形成在半导体晶片的表面部分中的半导体器件的封装和方法。 所述封装包括：设置在所述半导体晶片的表面部分上的电介质层，具有暴露开口以暴露所述器件中的一个的器件和用于暴露电接触焊盘的电触点焊盘开口; 以及所述装置中的多孔材料暴露在所述装置之一上的开口。
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公开(公告)号：US20120009735A1
公开(公告)日：2012-01-12
申请号：US13243179
申请日：2011-09-23
IPC分类号： H01L21/50
CPC分类号： H01L23/10 , H01L21/50 , H01L2224/48091 , H01L2924/1423 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要： A method for packaging a plurality of semiconductor devices formed in a surface portion of a semiconductor wafer. The method includes: lithographically forming, in a first lithographically processable material disposed on the surface portion of the semiconductor wafer, device exposing openings to expose the devices and electrical contact pad openings to expose electrical contact pads for devices; and mounting a support having a rigid dielectric layer formed on a selected portion of the support, such rigid dielectric layer comprising a second lithographically processable material, such rigid material being suspended over the device exposing openings and removed from portions of the support disposed over the electrical contacts pads openings in the first lithographically processable material. The support is released and removed from the second lithographically processable material, leaving the second photolithographically processable material bonded to the first photolithographically processable material.
摘要翻译： 一种用于封装形成在半导体晶片的表面部分中的多个半导体器件的方法。 该方法包括：在设置在半导体晶片的表面部分上的第一可光刻处理的材料中光刻形成设备，暴露出所述器件和电接触焊盘开口的开口以暴露用于器件的电接触焊盘; 以及安装具有形成在所述支撑件的选定部分上的刚性介电层的支撑件，所述刚性介电层包括第二可光刻处理的材料，所述刚性材料悬挂在所述装置上，露出开口并从所述电气 第一可光刻处理材料中的接触垫开口。 支撑体从第二种可光刻加工的材料中释放并除去，留下第二光刻加工材料结合到第一可光刻加工的材料上。
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公开(公告)号：US08035219B2
公开(公告)日：2011-10-11
申请号：US12175692
申请日：2008-07-18
CPC分类号： H01L23/10 , H01L21/50 , H01L2224/48091 , H01L2924/1423 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要： A method for packaging a plurality of semiconductor devices formed in a surface portion of a semiconductor wafer. The method includes: lithographically forming, in a first lithographically processable material disposed on the surface portion of the semiconductor wafer, device exposing openings to expose the devices and electrical contact pad openings to expose electrical contact pads for devices; and mounting a support having a rigid dielectric layer formed on a selected portion of the support, such rigid dielectric layer comprising a second lithographically processable material, such rigid material being suspended over the device exposing openings and removed from portions of the support disposed over the electrical contacts pads openings in the first lithographically processable material. The support is released and removed from the second lithographically processable material, leaving the second photolithographically processable material bonded to the first photolithographically processable material.
摘要翻译： 一种用于封装形成在半导体晶片的表面部分中的多个半导体器件的方法。 该方法包括：在设置在半导体晶片的表面部分上的第一可光刻处理的材料中光刻形成设备，暴露出所述器件和电接触焊盘开口的开口以暴露用于器件的电接触焊盘; 以及安装具有形成在所述支撑件的选定部分上的刚性介电层的支撑件，所述刚性介电层包括第二可光刻处理的材料，所述刚性材料悬挂在所述装置上，露出开口并从所述电气 第一可光刻处理材料中的接触垫开口。 支撑体从第二种可光刻加工的材料中释放并除去，留下第二光刻加工材料结合到第一可光刻加工的材料上。
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公开(公告)号：US08969176B2
公开(公告)日：2015-03-03
申请号：US12959549
申请日：2010-12-03
申请人： Ward G. Fillmore , William J. Davis
发明人： Ward G. Fillmore , William J. Davis
IPC分类号： H01L21/44 , H01L21/00 , B81C1/00 , H01L23/544 , H01L21/683
CPC分类号： B81C1/00301 , B81B2207/092 , B81B2207/095 , H01L21/6835 , H01L23/544 , H01L2221/68359 , H01L2221/68363 , H01L2221/68381 , H01L2223/54426 , H01L2924/00013 , H01L2924/0002 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00
摘要： A package for a plurality of semiconductor devices having: an electrical interconnect structure, comprising: an electrical interconnect structure; and an active device structure, comprising the plurality of semiconductor devices on an active device substrate. The electrical interconnect structure is bonded to the active device structure and the electrical interconnect structure provides electrical interconnection among the semiconductor devices.
摘要翻译： 一种用于多个半导体器件的封装，具有：电互连结构，包括：电互连结构; 以及有源器件结构，其包括在有源器件衬底上的多个半导体器件。 电互连结构被结合到有源器件结构，并且电互连结构提供半导体器件之间的电互连。
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公开(公告)号：US08178391B2
公开(公告)日：2012-05-15
申请号：US13243179
申请日：2011-09-23
CPC分类号： H01L23/10 , H01L21/50 , H01L2224/48091 , H01L2924/1423 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要： A method for packaging a plurality of semiconductor devices formed in a surface portion of a semiconductor wafer. The method includes: lithographically forming, in a first lithographically processable material disposed on the surface portion of the semiconductor wafer, device exposing openings to expose the devices and electrical contact pad openings to expose electrical contact pads for devices; and mounting a support having a rigid dielectric layer formed on a selected portion of the support, such rigid dielectric layer comprising a second lithographically processable material, such rigid material being suspended over the device exposing openings and removed from portions of the support disposed over the electrical contacts pads openings in the first lithographically processable material. The support is released and removed from the second lithographically processable material, leaving the second photolithographically processable material bonded to the first photolithographically processable material.
摘要翻译： 一种用于封装形成在半导体晶片的表面部分中的多个半导体器件的方法。 该方法包括：在设置在半导体晶片的表面部分上的第一可光刻处理的材料中光刻形成设备，暴露出所述器件和电接触焊盘开口的开口以暴露用于器件的电接触焊盘; 以及安装具有形成在所述支撑件的选定部分上的刚性介电层的支撑件，所述刚性介电层包括第二可光刻处理的材料，所述刚性材料悬挂在所述装置上，露出开口并从所述电气 第一可光刻处理材料中的接触垫开口。 支撑体从第二种可光刻加工的材料中释放并除去，留下第二光刻加工材料结合到第一可光刻加工的材料上。
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公开(公告)号：US20100013088A1
公开(公告)日：2010-01-21
申请号：US12175692
申请日：2008-07-18
CPC分类号： H01L23/10 , H01L21/50 , H01L2224/48091 , H01L2924/1423 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要： A method for packaging a plurality of semiconductor devices formed in a surface portion of a semiconductor wafer. The method includes: lithographically forming, in a first lithographically processable material disposed on the surface portion of the semiconductor wafer, device exposing openings to expose the devices and electrical contact pad openings to expose electrical contact pads for devices; and mounting a support having a rigid dielectric layer formed on a selected portion of the support, such rigid dielectric layer comprising a second lithographically processable material, such rigid material being suspended over the device exposing openings and removed from portions of the support disposed over the electrical contacts pads openings in the first lithographically processable material. The support is released and removed from the second lithographically processable material, leaving the second photolithographically processable material bonded to the first photolithographically processable material.
摘要翻译： 一种用于封装形成在半导体晶片的表面部分中的多个半导体器件的方法。 该方法包括：在设置在半导体晶片的表面部分上的第一可光刻处理的材料中光刻形成设备，暴露出所述器件和电接触焊盘开口的开口以暴露用于器件的电接触焊盘; 以及安装具有形成在所述支撑体的选定部分上的刚性介电层的支撑件，所述刚性介电层包括第二可光刻处理的材料，所述刚性材料悬挂在所述装置上，露出开口并从所述电气 第一可光刻处理材料中的接触垫开口。 支撑体从第二种可光刻加工的材料中释放并除去，留下第二光刻加工材料结合到第一可光刻加工的材料上。
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