Adaptive offset adjustment algorithm
    1.
    发明申请
    Adaptive offset adjustment algorithm 失效
    自适应偏移调整算法

    公开(公告)号:US20100135442A1

    公开(公告)日:2010-06-03

    申请号:US12314051

    申请日:2008-12-03

    Abstract: An apparatus and method is disclosed to compensate for one or more offsets in a communications signal. A communications receiver may carry out an offset adjustment algorithm to compensate for the one or more offsets. An initial search procedure determines one or more signal metric maps for one or more selected offset adjustment corrections from the one or more offset adjustment corrections. The offset adjustment algorithm determines one or more optimal points for one or more selected offset adjustment correction based upon the one or more signal maps. The adaptive offset algorithm adjusts each of the one or more selected offset adjustment corrections to their respective optimal points and/or each of one or more non-selected offset adjustment corrections to a corresponding one of a plurality of possible offset corrections to provide one or more adjusted offset adjustment corrections. A tracking mode procedure optimizes the one or more adjusted offset adjustment corrections.

    Abstract translation: 公开了一种用于补偿通信信号中的一个或多个偏移的装置和方法。 通信接收机可以执行偏移调整算法来补偿一个或多个偏移。 初始搜索过程从一个或多个偏移调整校正确定一个或多个所选偏移调整校正的一个或多个信号量度图。 偏移调整算法基于一个或多个信号映射确定一个或多个所选偏移调整校正的一个或多个最优点。 自适应偏移算法将一个或多个所选择的偏移调整校正中的每一个调整到它们各自的最佳点和/或一个或多个未选择的偏移调整校正中的每一个到多个可能的偏移校正中的对应的一个,以提供一个或多个 调整后的偏移调整校正。 跟踪模式过程优化一个或多个经调整的偏移调整校正。

    Multi-rate backplane transceiver
    2.
    发明授权
    Multi-rate backplane transceiver 有权
    多速率背板收发器

    公开(公告)号:US08130786B2

    公开(公告)日:2012-03-06

    申请号:US12112785

    申请日:2008-04-30

    CPC classification number: H04L12/6418 H04L49/90

    Abstract: An apparatus is disclosed that includes first transceiver circuitry adapted for transmitting and receiving Ethernet data over a network using a first Ethernet communication protocol at a first data rate, second transceiver circuitry adapted for transmitting and receiving Ethernet data over a network using a second Ethernet communication protocol at a second data rate; and third transceiver circuitry adapted for transmitting and receiving Ethernet data over a network using a third Ethernet communication protocol at a third data rate.

    Abstract translation: 公开了一种装置,其包括适于通过网络使用第一数据速率的第一以太网通信协议在网络上发送和接收以太网数据的第一收发器电路,适于通过第二以太网通信协议通过网络发送和接收以太网数据的第二收发器电路 以第二数据速率; 以及第三收发器电路,其适于以第三数据速率使用第三以太网通信协议通过网络发送和接收以太网数据。

    MULTI-PROTOCOL COMMUNICATIONS RECEIVER WITH SHARED ANALOG FRONT-END
    3.
    发明申请
    MULTI-PROTOCOL COMMUNICATIONS RECEIVER WITH SHARED ANALOG FRONT-END 有权
    多协议通信采用共享模拟前端

    公开(公告)号:US20120002713A1

    公开(公告)日:2012-01-05

    申请号:US12883842

    申请日:2010-09-16

    CPC classification number: H04L27/0002 H04B1/0007 H04B1/406

    Abstract: According to an example embodiment, a communications receiver may include a variable gain amplifier (VGA) configured to amplify received signals, a VGA controller configured to control the VGA, a plurality of analog to digital converter (ADC) circuits coupled to an output of the VGA, wherein the plurality of ADC circuits are operational when the communications receiver is configured to process signals of a first communications protocol, and wherein only a subset of the ADC circuits are operational when the communications receiver is configured to process signals of a second communications protocol.

    Abstract translation: 根据示例性实施例,通信接收机可以包括被配置为放大接收信号的可变增益放大器(VGA),被配置为控制VGA的VGA控制器,耦合到所述接收信号的输出的多个模数转换器 VGA,其中当所述通信接收器被配置为处理第一通信协议的信号时,所述多个ADC电路是可操作的,并且其中当所述通信接收器被配置为处理第二通信协议的信号时,只有所述ADC电路的子集可操作 。

    Gain control for interleaved analog-to-digital conversion for electronic dispersion compensation
    5.
    发明授权
    Gain control for interleaved analog-to-digital conversion for electronic dispersion compensation 失效
    用于电子色散补偿的交错模数转换的增益控制

    公开(公告)号:US07525462B2

    公开(公告)日:2009-04-28

    申请号:US11845762

    申请日:2007-08-27

    CPC classification number: H03M1/0836 H03M1/1215 H03M1/183

    Abstract: Embodiments include a system for performing dispersion compensation on an electromagnetic signal received over a communication channel, the electromagnetic signal bearing information at a symbol rate. An interleaved analog to digital converter (“ADC”) block may be used, wherein the interleaved ADC block may be configured to generate a plurality of digitally sampled signals from the electromagnetic signal. An interleaved equalizer block may be configured to digitally process each of the digitally sampled signals generated by the ADC block to generate a plurality of digitally equalized signals. A multiplexer may be configured to aggregate the digitally equalized signals into a composite output signal.

    Abstract translation: 实施例包括一种用于对通过通信信道接收的电磁信号进行色散补偿的系统,该电磁信号以符号速率承载信息。 可以使用交错模数转换器(“ADC”)块,其中交织的ADC块可以被配置为从电磁信号生成多个数字采样的信号。 交织的均衡器块可以被配置为数字地处理由ADC块产生的数字采样信号中的每一个以产生多个数字均衡的信号。 多路复用器可以被配置为将数字均衡的信号聚合成复合输出信号。

    PHASE CONTROL FOR INTERLEAVED ANALOG-TO-DIGITAL CONVERSION FOR ELECTRONIC DISPERSION COMPENSATION
    6.
    发明申请
    PHASE CONTROL FOR INTERLEAVED ANALOG-TO-DIGITAL CONVERSION FOR ELECTRONIC DISPERSION COMPENSATION 失效
    用于电子分散补偿的交互式模拟数字转换的相位控制

    公开(公告)号:US20080048897A1

    公开(公告)日:2008-02-28

    申请号:US11845765

    申请日:2007-08-27

    CPC classification number: H03M1/0836 H03M1/1215 H03M1/183

    Abstract: Embodiments include a system for performing dispersion compensation on an electromagnetic signal received over a communication channel, the electromagnetic signal bearing information at a symbol rate. An interleaved analog to digital converter (“ADC”) block may be used, wherein the interleaved ADC block may be configured to generate a plurality of digitally sampled signals from the electromagnetic signal. An interleaved equalizer block may be configured to digitally process each of the digitally sampled signals generated by the ADC block to generate a plurality of digitally equalized signals. A multiplexer may be configured to aggregate the digitally equalized signals into a composite output signal.

    Abstract translation: 实施例包括一种用于对通过通信信道接收的电磁信号进行色散补偿的系统,该电磁信号以符号速率承载信息。 可以使用交错模数转换器(“ADC”)块,其中交织的ADC块可以被配置为从电磁信号生成多个数字采样的信号。 交织的均衡器块可以被配置为数字地处理由ADC块产生的数字采样信号中的每一个以产生多个数字均衡的信号。 多路复用器可以被配置为将数字均衡的信号聚合成复合输出信号。

    GAIN CONTROL FOR INTERLEAVED ANALOG-TO-DIGITAL CONVERSION FOR ELECTRONIC DISPERSION COMPENSATION
    7.
    发明申请
    GAIN CONTROL FOR INTERLEAVED ANALOG-TO-DIGITAL CONVERSION FOR ELECTRONIC DISPERSION COMPENSATION 失效
    用于电子分散补偿的交互式模拟数字转换的增益控制

    公开(公告)号:US20080048896A1

    公开(公告)日:2008-02-28

    申请号:US11845762

    申请日:2007-08-27

    CPC classification number: H03M1/0836 H03M1/1215 H03M1/183

    Abstract: Embodiments include a system for performing dispersion compensation on an electromagnetic signal received over a communication channel, the electromagnetic signal bearing information at a symbol rate. An interleaved analog to digital converter (“ADC”) block may be used, wherein the interleaved ADC block may be configured to generate a plurality of digitally sampled signals from the electromagnetic signal. An interleaved equalizer block may be configured to digitally process each of the digitally sampled signals generated by the ADC block to generate a plurality of digitally equalized signals. A multiplexer may be configured to aggregate the digitally equalized signals into a composite output signal.

    Abstract translation: 实施例包括一种用于对通过通信信道接收的电磁信号进行色散补偿的系统,该电磁信号以符号速率承载信息。 可以使用交错模数转换器(“ADC”)块,其中交织的ADC块可以被配置为从电磁信号生成多个数字采样的信号。 交织的均衡器块可以被配置为数字地处理由ADC块产生的数字采样信号中的每一个以产生多个数字均衡的信号。 多路复用器可以被配置为将数字均衡的信号聚合成复合输出信号。

    Crosstalk emission management
    8.
    发明申请
    Crosstalk emission management 失效
    串扰排放管理

    公开(公告)号:US20070274379A1

    公开(公告)日:2007-11-29

    申请号:US11799368

    申请日:2007-05-01

    CPC classification number: H04L25/03343 H04B3/143 H04B3/32 H04L25/03038

    Abstract: Various embodiments are disclosed relating to crosstalk emission management. In an example embodiment, an amplitude of a main tap of a transmit equalizer may be determined to limit crosstalk emitted from a local channel to one or more other channels to be less than a threshold. A ratio of an amplitude of at least one secondary tap of the transmit equalizer to the amplitude of the main tap may be determined to provide equalization to the local channel.

    Abstract translation: 公开了与串扰发射管理相关的各种实施例。 在示例性实施例中,可以确定发射均衡器的主抽头的幅度以将从本地信道发射到一个或多个其他信道的串扰限制为小于阈值。 可以确定发射均衡器的至少一个次级抽头的幅度与主抽头的幅度的比率,以向本地信道提供均衡。

    Timing recovery system for a 10 BASE-T/100 BASE-T ethernet physical layer line interface
    9.
    发明授权
    Timing recovery system for a 10 BASE-T/100 BASE-T ethernet physical layer line interface 有权
    10个BASE-T / 100 BASE-T以太网物理层线路接口的定时恢复系统

    公开(公告)号:US06577689B1

    公开(公告)日:2003-06-10

    申请号:US09299050

    申请日:1999-04-23

    Abstract: A phase lock loop is provided for recovering timing information from a received data signal in a 100Base-TX receiver. The phase lock loop includes a phase encoder (803) for generating a reference phase error. An output phase value on a bus (809) is subtracted from the reference phase value on line (805) with a subtraction block (813) to generate a phase error. This phase error is averaged and decimated over a predetermined number of potential symbol transitions in the received signal. The output phase error is provided from a block (815) on a line (817) to a loop filter. This output is provided only once for each decimation operation such that the loop filter can operate at a lower clock rate. The phase error output is then utilized to select one of multiple clocks that correspond to the phase error, these being incremental phase clocks referenced to a master clock. This utilizes a clock multiplexer (1427) to select one of the multiple clock inputs which are delayed in phase off of the master clock. This selection is synchronized with the receive clock output of the multiplexer (1427) with the original output phase converted to gray encoded values. The ensures that only a single bit will be changed for any phase change such that only a single bit error will occur corresponding to a single value error.

    Abstract translation: 提供了一种锁相环,用于从100Base-TX接收机中接收的数据信号中恢复定时信息。 锁相环包括用于产生参考相位误差的相位编码器(803)。 总线(809)上的输出相位值通过减法模块(813)从线路(805)上的基准相位值中减去以产生相位误差。 该相位误差在接收信号中在预定数量的潜在符号跃迁上被平均并抽取。 输出相位误差从线路(817)上的块(815)提供给环路滤波器。 该输出对于每个抽取操作仅提供一次,使得环路滤波器可以以较低的时钟速率工作。 然后使用相位误差输出来选择与相位误差相对应的多个时钟之一,这些是相对于主时钟的增量相位时钟。 这利用时钟多路复用器(1427)来选择在主时钟相位延迟的多个时钟输入之一。 该选择与多路复用器(1427)的接收时钟输出同步,原始输出相转换为灰度编码值。 确保只有一个位将被改变以进行任何相位变化,使得仅针对单个值错误发生单个位错误。

    Use of multi-level modulation signaling for short reach data communications
    10.
    发明授权
    Use of multi-level modulation signaling for short reach data communications 有权
    使用多级调制信令进行短距离数据通信

    公开(公告)号:US08964818B2

    公开(公告)日:2015-02-24

    申请号:US13739782

    申请日:2013-01-11

    CPC classification number: H04L25/4917 H04L25/03057 H04L25/03885 H04L27/02

    Abstract: A short reach communication system includes a plurality of communication SERDES that communicate data over a short reach channel medium such as a backplane connection (e.g., PCB trace) between, for example, chips located on a common PCB. A multi-level modulated data signal is generated to transmit/receive data over the short reach channel medium. Multi-level modulated data signals, such as four-level PAM, reduce the data signal rate therefore reducing insertion loss, power, complexity of the circuits and required chip real estate.

    Abstract translation: 短距离通信系统包括多个通信SERDES,其通过短距离信道介质传送数据,例如位于公共PCB上的码片之间的背板连接(例如,PCB轨迹)。 生成多级调制数据信号以通过短距离信道介质发送/接收数据。 诸如四电平PAM的多电平调制数据信号降低数据信号速率,从而降低插入损耗,功率,电路的复杂性以及所需的芯片空间。

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