Performing customer bandwidth profiling in computer networks
    1.
    发明授权
    Performing customer bandwidth profiling in computer networks 有权
    在计算机网络中执行客户带宽分析

    公开(公告)号:US09100214B1

    公开(公告)日:2015-08-04

    申请号:US13171142

    申请日:2011-06-28

    Applicant: Vinod Joseph

    Inventor: Vinod Joseph

    CPC classification number: H04L12/4641 H04L12/4654 H04L12/4658

    Abstract: In general, techniques are described for performing customer bandwidth profiling in computer networks. A network device intermediately positioned in a service provider network between a customer network and a centralized network device that provides a hierarchical arrangement of virtual local area networks (VLANs) located in the service provider network may perform the techniques. The network device determines a service profile based on authentication messages and associates the service profile with the hierarchical arrangement of VLANs used for delivering the traffic to and from the customer network and the service provider network. The service profile defines constraints on delivery of the traffic associated with the one or more services. The network device then applies the service profile to the traffic received via the associated hierarchical arrangement of VLANs to enforce the constraints on the delivery of the traffic received via the associated hierarchical arrangement of VLANs.

    Abstract translation: 通常,描述了在计算机网络中执行客户带宽分析的技术。 位于客户网络和提供位于服务提供商网络中的虚拟局域网(VLAN)的分层布置的集中式网络设备之间的服务提供商网络中的网络设备可以执行该技术。 网络设备基于认证消息来确定服务简档,并将服务配置文件与用于将客户网络和服务提供商网络上的流量传送到VLAN的分层布置相关联。 服务简档定义了与一个或多个服务相关联的流量传递的约束。 然后,网络设备将业务简档应用于经由相关联的VLAN层级布置接收到的业务,以强制对通过相关联的VLAN分层布置接收的业务的传递的限制。

    ERROR PREDICTION IN LOGIC AND MEMORY DEVICES
    2.
    发明申请
    ERROR PREDICTION IN LOGIC AND MEMORY DEVICES 有权
    逻辑和存储器件中的错误预测

    公开(公告)号:US20140040692A1

    公开(公告)日:2014-02-06

    申请号:US13567512

    申请日:2012-08-06

    CPC classification number: G11C29/021 G06F11/24 G11C29/44 G11C2029/0409

    Abstract: Potential errors that might result from operating logic and/or memory circuits at an insufficient operating voltage are identified by electrically altering nodes of replica or operational circuits so that the electrically altered nodes are susceptible to errors. The electrically altered nodes in an embodiment are controlled using parametric drivers. A minimized operating voltage can be selected by operating at a marginal operating voltage and detecting a voltage threshold at which errors in the electrically altered nodes are detected, for example.

    Abstract translation: 可能由操作逻辑和/或存储器电路在不足的工作电压引起的潜在的错误通过电子改变复制或操作电路的节点来识别,使得电改变的节点容易出错。 使用参数驱动器控制实施例中的电改变的节点。 可以通过在边缘工作电压下操作并检测例如检测电气改变的节点中的错误的电压阈值来选择最小化的工作电压。

    MULTIPORT MEMORY EMULATION USING SINGLE-PORT MEMORY DEVICES
    3.
    发明申请
    MULTIPORT MEMORY EMULATION USING SINGLE-PORT MEMORY DEVICES 有权
    使用单端口存储器件进行多重存储器仿真

    公开(公告)号:US20140047197A1

    公开(公告)日:2014-02-13

    申请号:US13571343

    申请日:2012-08-09

    CPC classification number: G06F12/06 G11C8/16 Y02D10/13

    Abstract: A multiport memory emulator receives first and a second memory commands for concurrent processing of memory commands in one operation clock cycle. Data operands are stored in a memory array of bitcells that is arranged as rows and memory banks. An auxiliary memory bank provides a bitcell for physically storing an additional word for each row. The bank address portion of each of the first and second memory commands is respectively translated into a first and second physical bank address. The second physical bank address is assigned a bank address of a bank that is currently unused in response to a determination that the bank address portions are equal and the bank associated with the first bank address is designated as a currently unused bank for subsequently received memory commands in response to the determination that the bank address portions are equal. Simultaneous read and write operations are possible.

    Abstract translation: 多端口存储器仿真器在一个操作时钟周期中接收用于并行处理存储器命令的第一和第二存储器命令。 数据操作数存储在排列为行和存储体的位单元的存储器阵列中。 辅助存储体提供用于物理存储每行的附加字的比特单元。 第一和第二存储器命令中的每一个的存储体地址部分分别被转换为第一和第二物理存储体地址。 响应于银行地址部分相等的确定并且与第一银行地址相关联的银行被指定为用于随后接收的存储器命令的当前未使用的存储体,第二物理存储体地址被分配当前未使用的存储体的存储体地址 响应于银行地址部分相等的确定。 可以同时进行读写操作。

    Traffic Distribution Control
    4.
    发明申请
    Traffic Distribution Control 有权
    交通分布控制

    公开(公告)号:US20110069622A1

    公开(公告)日:2011-03-24

    申请号:US12564851

    申请日:2009-09-22

    CPC classification number: H04L43/50 H04L41/145 H04L41/22

    Abstract: There is disclosed apparatus and processes for generating simulated network test traffic from a stored test traffic definition. A network test system or a user may select arbitrary ways to group flows of test traffic into streams, and to modify these streams before and during transmission of the test traffic by network test equipment.

    Abstract translation: 公开了用于从存储的测试流量定义产生模拟网络测试流量的装置和过程。 网络测试系统或用户可以选择任意方式将测试业务流分组成流,并在网络测试设备传输测试业务之前和期间修改这些流。

    Error prediction in logic and memory devices
    5.
    发明授权
    Error prediction in logic and memory devices 有权
    逻辑和存储器件中的误差预测

    公开(公告)号:US08762804B2

    公开(公告)日:2014-06-24

    申请号:US13567512

    申请日:2012-08-06

    CPC classification number: G11C29/021 G06F11/24 G11C29/44 G11C2029/0409

    Abstract: Potential errors that might result from operating logic and/or memory circuits at an insufficient operating voltage are identified by electrically altering nodes of replica or operational circuits so that the electrically altered nodes are susceptible to errors. The electrically altered nodes in an embodiment are controlled using parametric drivers. A minimized operating voltage can be selected by operating at a marginal operating voltage and detecting a voltage threshold at which errors in the electrically altered nodes are detected, for example.

    Abstract translation: 可能由操作逻辑和/或存储器电路在不足的工作电压引起的潜在的错误通过电子改变复制或操作电路的节点来识别,使得电改变的节点容易出错。 使用参数驱动器控制实施例中的电改变的节点。 可以通过在边缘工作电压下操作并检测例如检测电气改变的节点中的错误的电压阈值来选择最小化的工作电压。

    Traffic distribution control
    6.
    发明授权
    Traffic distribution control 有权
    交通分配控制

    公开(公告)号:US08654654B2

    公开(公告)日:2014-02-18

    申请号:US12564851

    申请日:2009-09-22

    CPC classification number: H04L43/50 H04L41/145 H04L41/22

    Abstract: There is disclosed apparatus and processes for generating simulated network test traffic from a stored test traffic definition. A network test system or a user may select arbitrary ways to group flows of test traffic into streams, and to modify these streams before and during transmission of the test traffic by network test equipment.

    Abstract translation: 公开了用于从存储的测试流量定义产生模拟网络测试流量的装置和过程。 网络测试系统或用户可以选择任意方式将测试业务流分组成流,并在网络测试设备传输测试业务之前和期间修改这些流。

    Automated teller machine having access point and method for providing financial service using the same
    7.
    发明申请
    Automated teller machine having access point and method for providing financial service using the same 审中-公开
    自动取款机具有接入点和方法,用于提供使用该服务的金融服务

    公开(公告)号:US20060089893A1

    公开(公告)日:2006-04-27

    申请号:US11145660

    申请日:2005-06-06

    Abstract: An automated teller machine (ATM) having a wireless network access apparatus and a method for providing financial services using the ATM are provided. The ATM includes a user interface unit, a first financial processing unit, a first network access unit, a second network access unit, and a second financial service unit. The user interface unit performs data communication with a storage medium on which information is recorded, and outputs information to a user through an output apparatus. The first financial processing unit provides financial services including account inquiry, deposit, and withdrawal, by performing data communication processes with a recognized storage medium. The first network access unit is connected to an ATM network connected to a financial institution server, transmits data obtained as a result of performing financial services, to the financial institution server, and receives processed data from the financial institution server. The second network access unit is connected to an access point establishing a communication path for a wireless communication terminal of the user traveling in a predetermined communication area, and activating wireless communication. The second financial service unit performs data communication with the wireless communication terminal of the user through the access point, and provides at least one or more of financial services, digital token delivery service, and V2oIP service.

    Abstract translation: 提供了具有无线网络访问装置的自动柜员机(ATM)和使用ATM提供金融服务的方法。 ATM包括用户接口单元,第一金融处理单元,第一网络接入单元,第二网络接入单元和第二金融服务单元。 用户接口单元与记录有信息的存储介质进行数据通信,并通过输出装置向用户输出信息。 第一个财务处理单元通过使用公认的存储介质执行数据通信过程来提供金融服务,包括账户查询,存款和取款。 第一网络接入单元连接到连接到金融机构服务器的ATM网络,将作为执行金融服务的结果获得的数据发送到金融机构服务器,并从金融机构服务器接收处理的数据。 第二网络接入单元连接到建立用于在预定通信区域中行进的用户的无线通信终端的通信路径的接入点,并且激活无线通信。 第二金融服务单元通过接入点与用户的无线通信终端执行数据通信,并且提供金融服务,数字令牌发送服务和V2oIP服务中的至少一个或多个。

    Multiport memory emulation using single-port memory devices
    8.
    发明授权
    Multiport memory emulation using single-port memory devices 有权
    使用单端口存储设备的多端口存储器仿真

    公开(公告)号:US09158683B2

    公开(公告)日:2015-10-13

    申请号:US13571343

    申请日:2012-08-09

    CPC classification number: G06F12/06 G11C8/16 Y02D10/13

    Abstract: A multiport memory emulator receives first and a second memory commands for concurrent processing of memory commands in one operation clock cycle. Data operands are stored in a memory array of bitcells that is arranged as rows and memory banks. An auxiliary memory bank provides a bitcell for physically storing an additional word for each row. The bank address portion of each of the first and second memory commands is respectively translated into a first and second physical bank address. The second physical bank address is assigned a bank address of a bank that is currently unused in response to a determination that the bank address portions are equal and the bank associated with the first bank address is designated as a currently unused bank for subsequently received memory commands in response to the determination that the bank address portions are equal. Simultaneous read and write operations are possible.

    Abstract translation: 多端口存储器仿真器在一个操作时钟周期中接收用于并行处理存储器命令的第一和第二存储器命令。 数据操作数存储在排列为行和存储体的位单元的存储器阵列中。 辅助存储体提供用于物理存储每行的附加字的比特单元。 第一和第二存储器命令中的每一个的存储体地址部分分别被转换为第一和第二物理存储体地址。 响应于银行地址部分相等的确定并且与第一银行地址相关联的银行被指定为用于随后接收的存储器命令的当前未使用的存储体,第二物理存储体地址被分配当前未使用的存储体的存储体地址 响应于银行地址部分相等的确定。 可以同时进行读写操作。

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