公开(公告)号：US08195917B2

公开(公告)日：2012-06-05

申请号：US12496335

申请日：2009-07-01

Applicant: Michael P. Hohmuth ,  Uwe M. Dannowski ,  Sebastian Biemueller ,  David S. Christie ,  Stephan Diestelhorst ,  Thomas Friebel

Inventor： Michael P. Hohmuth ,  Uwe M. Dannowski ,  Sebastian Biemueller ,  David S. Christie ,  Stephan Diestelhorst ,  Thomas Friebel

IPC: G06F12/10

CPC classification number: G06F12/1009 ,  G06F12/1027 ,  G06F2212/652

Abstract: A processor including a virtual memory paging mechanism. The virtual memory paging mechanism enables an operating system operating on the processor to use pages of a first size and a second size, the second size being greater than the first size. The mechanism further enables the operating system to use superpages including two or more contiguous pages of the first size. The size of a superpage is less than the second size. The processor further includes a page table having a separate entry for each of the pages included in each superpage. The operating system accesses each superpage using a single virtual address. The mechanism interprets a single entry in a translation lookaside buffer TLB as referring to a region of memory comprising a set of pages that correspond to a superpage in response to detecting a superpage enable indicator associated with the entry in the TLB is asserted.

Abstract translation: 一种包括虚拟存储器寻呼机构的处理器。 虚拟存储器分页机构使得在处理器上操作的操作系统能够使用具有第一尺寸和第二尺寸的页面，第二尺寸大于第一尺寸。 该机制进一步使得操作系统能够使用包括第一尺寸的两个或更多个连续页面的超级页面。 超级页面的大小小于第二个大小。 处理器还包括页表，其具有用于每个超级页面中包括的每个页面的单独条目。 操作系统使用单个虚拟地址访问每个超级页面。 该机制将翻译后备缓存器TLB中的单个条目解释为响应于检测到与TLB中的条目相关联的超级页面使能指示符被断言的引用包括与超级页面相对应的页面的存储器区域。

公开(公告)号：US20110004739A1

公开(公告)日：2011-01-06

申请号：US12496335

申请日：2009-07-01

Applicant: Michael P. Hohmuth ,  Uwe M. Dannowski ,  Sebastian Biemueller ,  David S. Christie ,  Stephan Diestelhorst ,  Thomas Friebel

Inventor： Michael P. Hohmuth ,  Uwe M. Dannowski ,  Sebastian Biemueller ,  David S. Christie ,  Stephan Diestelhorst ,  Thomas Friebel

IPC: G06F12/10 ,  G06F12/00

CPC classification number: G06F12/1009 ,  G06F12/1027 ,  G06F2212/652

Abstract: A processor including a virtual memory paging mechanism. The virtual memory paging mechanism enables an operating system operating on the processor to use pages of a first size and a second size, the second size being greater than the first size. The mechanism further enables the operating system to use superpages including two or more contiguous pages of the first size. The size of a superpage is less than the second size. The processor further includes a page table having a separate entry for each of the pages included in each superpage. The operating system accesses each superpage using a single virtual address. The mechanism interprets a single entry in a translation lookaside buffer TLB as referring to a region of memory comprising a set of pages that correspond to a superpage in response to detecting a superpage enable indicator associated with the entry in the TLB is asserted.

Abstract translation: 一种包括虚拟存储器寻呼机构的处理器。 虚拟存储器分页机构使得在处理器上操作的操作系统能够使用具有第一尺寸和第二尺寸的页面，第二尺寸大于第一尺寸。 该机制进一步使得操作系统能够使用包括第一尺寸的两个或更多个连续页面的超级页面。 超级页面的大小小于第二个大小。 处理器还包括页表，其具有用于每个超级页面中包括的每个页面的单独条目。 操作系统使用单个虚拟地址访问每个超级页面。 该机制将翻译后备缓存器TLB中的单个条目解释为响应于检测到与TLB中的条目相关联的超级页面使能指示符被断言的引用包括与超级页面相对应的页面的存储器区域。