公开(公告)号：US20080197335A1

公开(公告)日：2008-08-21

申请号：US11976837

申请日：2007-10-29

Applicant: Tu-Hao YU

Inventor： Tu-Hao YU

IPC: H01L45/00

CPC classification number: H01L45/06 ,  H01L45/124 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1691

Abstract: A memory device is disclosed. A pillar structure comprises a first electrode layer, a dielectric layer overlying the first electrode layer, and a second electrode layer overlying the dielectric layer. A phase change layer covers a surrounding of the pillar structure. A bottom electrode electrically connects the first electrode layer of the pillar structure. A top electrode electrically connects the second electrode layer of the pillar structure.

Abstract translation: 公开了一种存储器件。 柱结构包括第一电极层，覆盖第一电极层的电介质层和覆盖在电介质层上的第二电极层。 相变层覆盖柱结构的周围。 底部电极电连接柱状结构的第一电极层。 顶电极电连接柱结构的第二电极层。

公开(公告)号：US20050142877A1

公开(公告)日：2005-06-30

申请号：US10801884

申请日：2004-03-15

Applicant: Tu-Hao Yu ,  Pai-Hsuan Sun ,  Yu-Chia Chen

Inventor： Tu-Hao Yu ,  Pai-Hsuan Sun ,  Yu-Chia Chen

IPC: H01L21/3105 ,  H01L21/321 ,  H01L21/768 ,  H01L21/44 ,  H01L21/302 ,  H01L21/461

CPC classification number: H01L21/3212 ,  H01L21/31053 ,  H01L21/76819 ,  H01L21/7684

Abstract: A chemical-mechanical polishing (CMP) proximity correction method for polishing a wafer is provided. The wafer has a polish area and a protected area. The method includes forming a material layer over the wafer to cover the polish area and the protected area and then forming a protective layer over the material layer. Thereafter, the protective layer is patterned so that the remaining protective layer is at a distance away from the boundary of the polish area to reduce shadowing effects. Because the boundary of the protective layer above the material layer recedes to an area at a distance away from polish area, the whole polish area can be cleanly polished.

Abstract translation: 提供了一种用于抛光晶片的化学机械抛光（CMP）接近校正方法。 晶圆具有抛光区域和保护区域。 该方法包括在晶片上形成材料层以覆盖抛光区域和保护区域，然后在材料层上形成保护层。 此后，保护层被图案化，使得剩余的保护层距离抛光区域的边界一定距离以减少遮蔽效应。 因为材料层之上的保护层的边界退回到距离抛光区域一定距离的区域，所以整个抛光区域可以被清洁地抛光。

公开(公告)号：US20090148980A1

公开(公告)日：2009-06-11

申请号：US12189090

申请日：2008-08-08

Applicant: Tu-Hao Yu

Inventor： Tu-Hao Yu

IPC: H01L45/00

CPC classification number: H01L45/1691 ,  H01L45/06 ,  H01L45/124 ,  H01L45/144

Abstract: A method for forming a phase-change memory element. The method includes providing a substrate with an electrode formed thereon; sequentially forming a conductive layer and a first dielectric layer on the substrate; forming a patterned photoresist layer on the first dielectric layer; subjecting the patterned photoresist layer to a trimming process, remaining a photoresist pillar; etching the first dielectric layer with the photoresist pillar as etching mask, remaining a dielectric pillar; comformally forming a first phase-change material layer on the conductive layer and the dielectric pillar to cover the top surface and side walls of the dielectric pillar; forming a second dielectric layer to cover the first phase-change material layer; subjecting to the second dielectric layer and the first phase-change material layer to a planarization until exposing the top surface of the dielectric pillar; and forming a second phase-change material layer on the second dielectric layer.

Abstract translation: 一种形成相变存储元件的方法。 该方法包括提供其上形成有电极的基板; 在基板上依次形成导电层和第一介质层; 在所述第一介电层上形成图案化的光致抗蚀剂层; 对图案化的光致抗蚀剂层进行修整工艺，保留光刻胶柱; 用光致抗蚀剂柱蚀刻第一介电层作为蚀刻掩模，保留介电柱; 在所述导电层和所述电介质柱上形成第一相变材料层以覆盖所述介电柱的顶表面和侧壁; 形成第二介电层以覆盖所述第一相变材料层; 对第二介电层和第一相变材料层进行平面化，直到暴露介电柱的顶表面; 以及在所述第二介电层上形成第二相变材料层。

公开(公告)号：US07670869B2

公开(公告)日：2010-03-02

申请号：US11976837

申请日：2007-10-29

Applicant: Tu-Hao Yu

Inventor： Tu-Hao Yu

IPC: H01L21/00

CPC classification number: H01L45/06 ,  H01L45/124 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1691

Abstract: A memory device is disclosed. A pillar structure comprises a first electrode layer, a dielectric layer overlying the first electrode layer, and a second electrode layer overlying the dielectric layer. A phase change layer covers a surrounding of the pillar structure. A bottom electrode electrically connects the first electrode layer of the pillar structure. A top electrode electrically connects the second electrode layer of the pillar structure.

Abstract translation: 公开了一种存储器件。 柱结构包括第一电极层，覆盖第一电极层的电介质层和覆盖在电介质层上的第二电极层。 相变层覆盖柱结构的周围。 底部电极电连接柱状结构的第一电极层。 顶电极电连接柱结构的第二电极层。

公开(公告)号：US07138654B2

公开(公告)日：2006-11-21

申请号：US10801884

申请日：2004-03-15

Applicant: Tu-Hao Yu ,  Pai-Hsuan Sun ,  Yu-Chia Chen

Inventor： Tu-Hao Yu ,  Pai-Hsuan Sun ,  Yu-Chia Chen

IPC: H01L23/58

CPC classification number: H01L21/3212 ,  H01L21/31053 ,  H01L21/76819 ,  H01L21/7684

Abstract: A chemical-mechanical polishing (CMP) proximity correction method for polishing a wafer is provided. The wafer has a polish area and a protected area. The method includes forming a material layer over the wafer to cover the polish area and the protected area and then forming a protective layer over the material layer. Thereafter, the protective layer is patterned so that the remaining protective layer is at a distance away from the boundary of the polish area to reduce shadowing effects. Because the boundary of the protective layer above the material layer recedes to an area at a distance away from polish area, the whole polish area can be cleanly polished.

Abstract translation: 提供了一种用于抛光晶片的化学机械抛光（CMP）接近校正方法。 晶圆具有抛光区域和保护区域。 该方法包括在晶片上形成材料层以覆盖抛光区域和保护区域，然后在材料层上形成保护层。 此后，保护层被图案化，使得剩余的保护层距离抛光区域的边界一定距离以减少遮蔽效应。 因为材料层之上的保护层的边界退回到距离抛光区域一定距离的区域，所以整个抛光区域可以被清洁地抛光。

公开(公告)号：US06906377B2

公开(公告)日：2005-06-14

申请号：US10250038

申请日：2003-05-30

Applicant: Chih-Jung Ni ,  Chung-Ming Chu ,  Tu-Hao Yu ,  Kuo-Chen Wang ,  Wen-Shun Lo ,  Haochieh Liu

Inventor： Chih-Jung Ni ,  Chung-Ming Chu ,  Tu-Hao Yu ,  Kuo-Chen Wang ,  Wen-Shun Lo ,  Haochieh Liu

IPC: H01L21/28 ,  H01L21/336 ,  H01L21/8242 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788

CPC classification number: H01L27/11521 ,  H01L21/28273 ,  H01L27/115

Abstract: A flash memory cell is described, including at least a substrate, a tunnel oxide layer, a floating gate, an insulating layer, a control gate and an inter-gate dielectric layer. The tunnel oxide layer is disposed on the substrate. The floating gate is disposed on the tunnel oxide layer, and is constituted by a first conductive layer on the tunnel oxide layer and a second conductive layer on the first conductive layer. The second conductive layer has a bottom lower than the top surface of the first conductive layer, and has a bowl-like cross section. The insulating layer is disposed between the floating gates, and each control gate is disposed on a floating gate with an inter-gate dielectric layer between them.

Abstract translation: 描述闪存单元，其包括至少衬底，隧道氧化物层，浮动栅极，绝缘层，控制栅极和栅极间介电层。 隧道氧化物层设置在基板上。 浮置栅极设置在隧道氧化物层上，由隧道氧化物层上的第一导电层和第一导电层上的第二导电层构成。 第二导电层具有比第一导电层的顶表面低的底部，并且具有碗状横截面。 绝缘层设置在浮置栅极之间，并且每个控制栅极设置在浮置栅极之间，栅间电介质层之间。

公开(公告)号：US06382861B1

公开(公告)日：2002-05-07

申请号：US09637175

申请日：2000-08-11

Applicant: Ting-Kou Chen ,  Tu-Hao Yu ,  Chi-Yeh Huang ,  Yi-Yuan Chen

Inventor： Ting-Kou Chen ,  Tu-Hao Yu ,  Chi-Yeh Huang ,  Yi-Yuan Chen

IPC: B43K500

CPC classification number: B08B3/04 ,  A47L13/26 ,  B08B1/00

Abstract: A cleaning device for cleaning the dirt is disclosed. The cleaning device includes a container for receiving the cleaning material therein, a permeating element disposed in the container for introducing the cleaning material, and a cleaning head mounted on one end of the container and connecting with the permeating element for cleaning the dirt.

Abstract translation: 公开了一种用于清洁污物的清洁装置。 清洁装置包括用于容纳清洁材料的容器，设置在容器中用于引入清洁材料的渗透元件，以及安装在容器的一端并与渗透元件连接以清洁污物的清洁头。