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公开(公告)号：US09136812B2
公开(公告)日：2015-09-15
申请号：US14003796
申请日：2012-03-15
申请人： Thomas Kuhwald , Thomas Valten
发明人： Thomas Kuhwald , Thomas Valten
CPC分类号： H03G3/20 , H03G3/3052
摘要： A device for the automatic adjustment of a gain and/or attenuation factor of several amplification or attenuation elements connected in a cascade comprises respectively a detector for measuring a signal level of a signal disposed at the input of the respective amplification or attenuation element and respectively a downstream control unit for determining the gain and/or attenuation factor respectively associated with each amplification or attenuation element. The control unit is a forward control unit for determining the gain and/or attenuation factor respectively associated with each amplification or attenuation element dependent upon the measured signal level of the signal disposed at the input of each amplification or attenuation element.
摘要翻译： 用于自动调整串联连接的多个放大或衰减元件的增益和/或衰减因子的装置分别包括用于测量设置在相应放大或衰减元件的输入处的信号的信号电平的检测器， 下游控制单元，用于确定分别与每个放大或衰减元件相关联的增益和/或衰减因子。 控制单元是用于根据设置在每个放大或衰减元件的输入处的信号的测量信号电平来确定分别与每个放大或衰减元件相关联的增益和/或衰减因子的正向控制单元。
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公开(公告)号：US08289336B2
公开(公告)日：2012-10-16
申请号：US11836447
申请日：2007-08-09
申请人： Thomas Kuhwald , Florian Janku
发明人： Thomas Kuhwald , Florian Janku
CPC分类号： G01R13/0272
摘要： In an system for representing a signal on a display device, the signal is fed to a first sampling device and, time-displaced via a time-delay device, is fed at least to a second sampling device for sampling. The sampling values of the first sampled signal and the sampling values of the second sampled signal are appropriately ordered in a first memory control device of a first component connected to the first sampling device in order to compensate a time-delay of the sampling values of the second sampled signal caused by the time-delay device, and are passed to a post-treatment device provided in the first component and connected to the display device.
摘要翻译： 在用于在显示装置上表示信号的系统中，该信号被馈送到第一采样装置，并经由时间延迟装置进行时移，至少馈送到第二采样装置进行采样。 第一采样信号的采样值和第二采样信号的采样值在连接到第一采样设备的第一组件的第一存储器控制设备中被适当地排序，以便补偿第一采样信号的采样值的时间延迟 由所述延时装置引起的第二采样信号，并被传递到设置在所述第一部件中并连接到所述显示装置的后处理装置。
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公开(公告)号：US20110096881A1
公开(公告)日：2011-04-28
申请号：US12672482
申请日：2008-08-20
IPC分类号： H04L7/00
CPC分类号： H04L7/0083 , G01R31/31709 , G01R31/31711 , H03L7/06 , H04L1/205 , H04L7/0087 , H04L7/0331
摘要： A method for the recovery of a clock signal from a data signal, wherein the edges of the data signal and the clock signal are each presented by an ordered sequence of timing points, comprising determining missing edges in the sequence of data-signal edges, inserting new data-signal edges (Dx) into the sequence of data-signal edges to obtain a completed sequence of data-signal edges, and recovering the clock signal from the completed sequence of data-signal edges. The detection of missing edges in the sequence of data-signal edges is based on a prediction of the clock signal (FRONT CLOCK).
摘要翻译： 一种用于从数据信号恢复时钟信号的方法，其中数据信号和时钟信号的边缘各自由定时点的有序序列呈现，包括确定数据信号边缘序列中的丢失边缘，插入 将新的数据信号边缘（Dx）转换成数据信号边缘序列，以获得完整的数据信号边缘序列，以及从完成的数据信号边缘序列恢复时钟信号。 在数据信号边缘序列中检测到丢失边缘是基于时钟信号（FRONT CLOCK）的预测。
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4.发明授权公开(公告)号：US07039471B2
公开(公告)日：2006-05-02
申请号：US10456523
申请日：2003-06-09
申请人： Thomas Kuhwald
发明人： Thomas Kuhwald
IPC分类号： G05B15/00
CPC分类号： G05B5/01
摘要： A device for calculating the steady state behavior of a controller includes an amount generating unit for generating the amount of deviation of the regulator, a first threshold value calculation unit that detects whether the amount of deviation of the regulator has fallen below a first threshold value and then starts a lag time delay unit, and a second threshold value calculation unit that detects whether the amount of deviation of the regulator has fallen below a second threshold value. A signal transmission unit transmits a ready message signal when the lag time delay unit has reached a predetermined lag time and the second threshold value calculation unit has detected that the amount of deviation of the regulator has fallen below the second threshold value.
摘要翻译： 用于计算控制器的稳态特性的装置包括用于产生调节器的偏差量的量产生单元，检测调节器的偏差量是否已经低于第一阈值的第一阈值计算单元，以及 然后启动延迟时间延迟单元，以及第二阈值计算单元，其检测调节器的偏差量是否已经低于第二阈值。 当延迟时间延迟单元已经达到预定的滞后时间时，信号发送单元发送就绪消息信号，并且第二阈值计算单元已经检测到调节器的偏差量已经低于第二阈值。
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公开(公告)号：US08625729B2
公开(公告)日：2014-01-07
申请号：US12672482
申请日：2008-08-20
IPC分类号： H03D3/24
CPC分类号： H04L7/0083 , G01R31/31709 , G01R31/31711 , H03L7/06 , H04L1/205 , H04L7/0087 , H04L7/0331
摘要： A method for the recovery of a clock signal from a data signal, wherein the edges of the data signal and the clock signal are each presented by an ordered sequence of timing points, comprising determining missing edges in the sequence of data-signal edges, inserting new data-signal edges (Dx) into the sequence of data-signal edges to obtain a completed sequence of data-signal edges, and recovering the clock signal from the completed sequence of data-signal edges. The detection of missing edges in the sequence of data-signal edges is based on a prediction of the clock signal (FRONT CLOCK).
摘要翻译： 一种用于从数据信号恢复时钟信号的方法，其中数据信号和时钟信号的边缘各自由定时点的有序序列呈现，包括确定数据信号边缘序列中的丢失边缘，插入 将新的数据信号边缘（Dx）转换成数据信号边缘序列，以获得完整的数据信号边缘序列，以及从完成的数据信号边缘序列恢复时钟信号。 在数据信号边缘序列中检测到丢失边缘是基于时钟信号（FRONT CLOCK）的预测。
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公开(公告)号：US20130003815A1
公开(公告)日：2013-01-03
申请号：US13583856
申请日：2011-07-19
IPC分类号： H04B17/00
CPC分类号： G01R31/31708
摘要： A method for marking a signal edge, which has been removed from at least one decimated binary signal after the decimation of an associated binary signal, within the decimated binary signal, establishes successive signal portions of the respective binary signal, in each case with a number of sampled values corresponding to a decimation factor of the decimation. It detects a signal edge removed through decimation from each signal portion if the number of signal edges determined in each signal portion of the respective binary signal is greater than one. Then, the sampled values of the respective decimated binary signal are determined through decimation of the sampled values of the associated binary signal with the decimation factor, and the removed signal edge at the sampling time of the decimated binary signal which corresponds to the signal portion of the associated binary signal with the signal edge removed through decimation is marked.
摘要翻译： 在抽取的二进制二进制信号中，在相关联的二进制信号抽取之后已经从至少一个抽取的二进制信号中去除的信号边缘的方法建立相应的二进制信号的连续的信号部分， 对应于抽取的抽取因子的采样值。 如果在相应的二进制信号的每个信号部分中确定的信号边缘的数量大于1，则它检测从每个信号部分抽取去除的信号边缘。 然后，通过用抽取因子对相关联的二进制信号的采样值进行抽取来确定相应的抽取二进制信号的采样值，并且在抽取二进制信号的采样时间对应于对应于 标记通过抽取去除信号边缘的相关二进制信号。
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7.发明授权Device and method for the analysis of a measured signal transmitted via a multi-channel system 有权用于分析通过多通道系统传输的测量信号的装置和方法公开(公告)号：US08040125B2
公开(公告)日：2011-10-18
申请号：US12440442
申请日：2007-07-10
申请人： Thomas Kuhwald , Markus Freidhof
发明人： Thomas Kuhwald , Markus Freidhof
IPC分类号： G01R23/14
CPC分类号： G01R13/0254
摘要： A device, in particular, a multi-channel oscilloscope, for the analysis of at least one measured signal transmitted via a multi-channel system, with several measurement channels. The device includes in each case a sampling device, a baseband mixing device, and a filter device, and an analysis device. The measured signal is supplied to the measurement channels and to the respective sampling devices for simultaneous sampling. The sampled measured signal is supplied to the baseband mixing devices connected downstream of the sampling devices for the mixing of the measured signal down into the baseband, to the filter devices connected downstream of the baseband mixing devices for the decimation of the sampled values of the measured signal in the baseband and to the analysis device connected to the filter devices for the analysis of the measured signal.
摘要翻译： 一种设备，特别是多通道示波器，用于分析通过多通道系统传输的至少一个测量信号，并具有多个测量通道。 该装置在每种情况下包括采样装置，基带混合装置和滤波装置以及分析装置。 测量信号被提供给测量通道和相应的采样装置，用于同时采样。 采样的测量信号被提供给连接在采样装置下游的基带混合装置，用于将测量信号下降到基带，连接到基带混合装置下游的滤波器装置，以抽取所测量的采样值 信号在基带和分析设备连接到滤波器上进行测量信号的分析。
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8.发明申请Controller-Assisted Method and Controller-Assisted Device for Determining a Characteristic of a Compensation Member in a Level Control Circuit 失效控制器辅助方法和控制器辅助装置，用于确定电平控制电路中的补偿部件的特性公开(公告)号：US20080315947A1
公开(公告)日：2008-12-25
申请号：US11659384
申请日：2005-06-29
申请人： Thomas Kuhwald , Werner Held
发明人： Thomas Kuhwald , Werner Held
IPC分类号： H03F1/32
CPC分类号： H03F1/3247
摘要： In a controller-assisted device for determining a characteristic of a compensation element in a level control circuit, the compensation element is serially mounted inside the level control circuit for a high-frequency signal (S HF ) in a signal channel with respect to said signal channel. The characteristic of the compensation element has a characteristic which the inverse of the non-linear transmission characteristic of the signal channel in the event of ideal compensation. In the controller-assisted method for the determination of a characteristic of the compensation element in a level control circuit, each ordinate value of the characteristic of the compensation element arises, in the event of a bridged compensation element, from the corrective signal value (Pastel) which is adjusted at a signal level of the level reference signal (Pref) in the adjusted level control circuit, corresponding to the associated abscissa value of the characteristic of the compensation element.
摘要翻译： 在用于确定电平控制电路中的补偿元件的特性的控制器辅助装置中，补偿元件串联地安装在用于高频信号的电平控制电路（S
HF ）中 相对于所述信号通道的信号通道。 补偿元件的特性具有在理想补偿的情况下信号通道的非线性传输特性相反的特性。 在用于确定电平控制电路中的补偿元件的特性的控制器辅助方法中，在桥接补偿元件的情况下，补偿元件的特性的每个纵坐标值都来自校正信号值（Pastel ），其在调整电平控制电路中的电平参考信号（Pref）的信号电平上被调整，对应于补偿元件的特性的相关联的横坐标值。 -
公开(公告)号：US08208594B2
公开(公告)日：2012-06-26
申请号：US12595127
申请日：2008-08-20
IPC分类号： H04L7/00
CPC分类号： H04L7/0083 , G01R31/31709 , G01R31/31711 , H03L7/06 , H04L1/205 , H04L7/0087 , H04L7/0331
摘要： A method for the recovery of a clock signal from a data signal is provided where the edges of the signals are each represented as a chronologically-ordered sequence of timing points. In one procedural stage, a plurality of timing points of the data signal are processed in parallel as follows: resolving the timing points of the data signal by a nominal clock pulse; estimating the bit-period deviations for the adjusted timing points; and injecting the nominal clock pulse to the estimated bit-period deviations.
摘要翻译： 提供了一种从数据信号恢复时钟信号的方法，其中信号的边缘各自表示为时间顺序的定时点序列。 在一个程序级中，数据信号的多个定时点如下并行处理：通过标称时钟脉冲来解析数据信号的定时点; 估计调整时间点的位周期偏差; 并将标称时钟脉冲注入估计的位周期偏差。
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10.发明申请METHOD AND DEVICE FOR DIGITAL TRIGGERING OF A MEASUREMENT SIGNAL HAVING A SUPERIMPOSED NOISE SIGNAL 有权用于数字触发具有超级噪声信号的测量信号的方法和装置公开(公告)号：US20100045260A1
公开(公告)日：2010-02-25
申请号：US12299751
申请日：2007-04-19
申请人： Thomas Kuhwald , Johann Huber , Markus Freidhof
发明人： Thomas Kuhwald , Johann Huber , Markus Freidhof
IPC分类号： G01R13/34
CPC分类号： G01R13/0254 , G01D3/032
摘要： A method for digital triggering of a digital recording of a digitized measurement signal having a superimposed noise signal. The method includes generating from the digitized measurement signal a digital triggering signal for the digital triggering of the digital recording of the measurement signal, and performing band-limitation of the noise signal superimposed on the digitized measurement signal via a low-pass filtering before the digital triggering signal is generated. The bandwidth of the low-pass filtering is adjusted dependent upon edge steepness of the measurement signal, in order to reduce variance σt2 in jitter of the digital triggering signal.
摘要翻译： 一种用于数字触发具有叠加噪声信号的数字化测量信号的数字记录的方法。 该方法包括从数字化测量信号产生用于数字触发测量信号的数字触发的数字触发信号，并且在数字化测量信号之前通过低通滤波对叠加在数字化测量信号上的噪声信号进行频带限制 产生触发信号。 根据测量信号的边缘陡度来调整低通滤波的带宽，以减少数字触发信号的抖动的方差和t2。
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