公开(公告)号：US20110155318A1

公开(公告)日：2011-06-30

申请号：US12979044

申请日：2010-12-27

申请人： Hideo SHIBATA ,  Tatsuya Shinoda ,  Takayuki Iizuka ,  Yukinori Ueda ,  Susumu Otani ,  Toshifumi Shimizu

发明人： Hideo SHIBATA ,  Tatsuya Shinoda ,  Takayuki Iizuka ,  Yukinori Ueda ,  Susumu Otani ,  Toshifumi Shimizu

IPC分类号： B32B37/02 ,  B32B37/06 ,  B32B37/12 ,  B32B37/14

CPC分类号： G02F1/1303 ,  G02F2001/133331 ,  G02F2201/50 ,  Y10T156/10

摘要： An embodiment of manufacturing method of a flat-panel display device having a display panel and a transparent protector sheet; comprises: setting a bi-directionally Y-shape branched line pattern within a rectangular to-be-bonded area, which is formed of two Y-shaped intersections of a center line and angle bisector lines of the corners, of the to-be-bonded area; and applying adhesive resin onto the protector sheet or onto the display panel by forming circular or ellipsoidal dot patterns of applied adhesive resin so that: the dot patterns are arranged on the center-line segment and on the branch lines or their vicinities; and the dot patterns are arranged in symmetry with respect to the center line and to its perpendicular bisector.

摘要翻译： 具有显示面板和透明保护片的平板显示装置的制造方法的一个实施例; 包括：在待切割区域中设置双向Y形分支线图案，所述双向Y字形分支线图案由要形成的角部的中心线和角平分线之间的两个Y形交叉点形成， 保税区 并通过形成施加的粘合剂树脂的圆形或椭球形图案将粘合剂树脂施加到保护片或显示面板上，使得：点图案布置在中心线段和分支线或其附近; 并且点图案相对于中心线和其垂直的平分线对称布置。

公开(公告)号：US5148451A

公开(公告)日：1992-09-15

申请号：US612087

申请日：1990-11-09

申请人： Susumu Otani ,  Motoya Iwasaki

发明人： Susumu Otani ,  Motoya Iwasaki

IPC分类号： H04B7/15 ,  H04B7/26 ,  H04L27/00 ,  H04L27/227

CPC分类号： H04L27/2273 ,  H04L2027/0065 ,  H04L2027/0067 ,  H04L2027/0073

摘要： Supplied with an input signal into which a carrier signal is modulated at a frame period by a data signal and unique words periodically interspersed throughout the data signal, a demodulating circuit (16) quadrature demodulates the input signal into an output signal. A cross-correlating circuit (23) calculates a cross-correlation coefficient between the output signal and a locally known unique word. A frame synchronizing circuit (24) compares the cross-correlation coefficient with a predetermined threshold value and delivers an aperture when the cross-correlation coefficient is below the predetermined threshold value. A phase calculating circuit (25) calculates phase errors between a recovered carrier signal recovered from the output signal and a regenerated carrier signal which is a correct reproduction of the carrier signal. The phase errors are set in a carrier regenerating circuit (17) to render the recovered carrier signal identical with the regenerated carrier signal at the aperture interval. Preferably, a frequency calculating circuit calculates frequency errors between the recovered and the regenerated carrier signals for use in making the recovered carrier signal identical with the regenerated carrier signal not only as regards phase but also as regards frequency.

摘要翻译： 提供一个输入信号，一个载波信号在帧周期被一个数据信号调制，而唯一的字周期地散布在整个数据信号中，解调电路（16）将输入信号正交解调成一个输出信号。 交叉相关电路（23）计算输出信号和本地已知唯一字之间的互相关系数。 帧同步电路（24）将互相关系数与预定阈值进行比较，并且当互相关系数低于预定阈值时传送孔径。 相位计算电路（25）计算从输出信号恢复的恢复的载波信号与作为载波信号的正确再现的再生载波信号之间的相位误差。 在载波再生电路（17）中设定相位误差，使恢复的载波信号与再生的载波信号以孔径间隔相同。 优选地，频率计算电路计算恢复的和再生的载波信号之间的频率误差，用于使恢复的载波信号与再生的载波信号相同，不仅关于相位而且与频率相关。

公开(公告)号：US4967413A

公开(公告)日：1990-10-30

申请号：US77163

申请日：1987-07-24

申请人： Susumu Otani

发明人： Susumu Otani

IPC分类号： H04L1/00 ,  H04L1/20 ,  H04L7/10

CPC分类号： H04L1/00

摘要： An apparatus for detecting burst signals used in satellite communication, for example, detects burst signals of the type comprising a unique word followed by a series of data. The burst signals are of the type that have undergone cyclic redundancy check (CRC) coding and error-correction coding. A unique word detector detects the unique word in the burst signal. An error-correcting decoder decodes the error-correction code used with the data. Two forms of error detection are used to reduce the possibility of erroneous data being mistakenly considered error-free. A cyclic redundancy check error detector detects any CRC error in the decoded data. A channel quality detector detects quality of the channel on which the burst signal is received. An output circuit provides an output signal indicating presence or absence of error in the data in response to outputs of the unique word detector, the CRC error detector, and the channel quality detector.

摘要翻译： 例如，用于检测在卫星通信中使用的突发信号的装置检测包括唯一字后面是一系列数据的类型的突发信号。 突发信号是经过循环冗余校验（CRC）编码和纠错编码的类型。 独特的字检测器检测脉冲串信号中的唯一字。 纠错解码器解码与数据一起使用的纠错码。 使用两种形式的错误检测来减少错误数据误认为无错误的可能性。 循环冗余校验错误检测器检测解码数据中的任何CRC错误。 信道质量检测器检测接收到突发信号的信道的质量。 输出电路响应于唯一字检测器，CRC错误检测器和信道质量检测器的输出，提供指示数据中存在或不存在错误的输出信号。

公开(公告)号：US4780887A

公开(公告)日：1988-10-25

申请号：US87319

申请日：1987-08-20

申请人： Susumu Otani ,  Yoshio Tanimoto ,  Shousei Yoshida

发明人： Susumu Otani ,  Yoshio Tanimoto ,  Shousei Yoshida

IPC分类号： H04L27/227 ,  H04L27/14

CPC分类号： H04L27/2277

摘要： A carrier recovery circuit comprises first and second mixers for mixing a received PSK signal with first and second reference frequency signals. A remodulator extracts a preamble from each burst of the PSK signal and supplies the extracted carrier to a carrier recovery means to cause it to derive a reference carrier from the extracted preamble. A phase detector is connected to the outputs of the first and second mixers for detecting a phase difference between the PSK signal and the reference carrier, the detected phase difference being applied to a resettable noise reduction circuit for reducing amplitude fluctuations contained in the phase difference, the noise reduction circuit being arranged to be reset in response to each of the bursts to discharge energy stored as a result of the noise reduction and eliminate interburst phase errors which occur as a result of interburst frequency variations. A variable phase shifter controls the phase of the reference carrier in accordance with the output of the noise eliminator and supplies quadrature versions of the phase controlled carrier to the first and second mixers as the first and second reference frequency signals.

公开(公告)号：US4686484A

公开(公告)日：1987-08-11

申请号：US850747

申请日：1986-04-11

申请人： Susumu Otani

发明人： Susumu Otani

IPC分类号： H03D13/00 ,  H03D3/00 ,  H04L7/033 ,  H04L27/00 ,  H04L7/06

CPC分类号： H04L7/0334

摘要： A phase detector demodulates a carrier wave which is modulated by a phase shift keying (PSK), a quadrature amplitude modulation, or a similar digital modulated wave. The detector detects the phase difference between an analog signal and a reference clock signal. The analog signal is sampled at the frequency of the clock signal and provides a first k-bit digital signal. A delay circuit samples the first digital signal at one-half of the reference signal frequency in order to produce a second k-bit digital signal. A multiplier multiplies the first and second digital signals and gives a phase difference signal.

摘要翻译： 相位检测器解调由相移键控（PSK），正交幅度调制或类似的数字调制波调制的载波。 检测器检测模拟信号和参考时钟信号之间的相位差。 模拟信号以时钟信号的频率进行采样，并提供第一个k位数字信号。 延迟电路以参考信号频率的一半采样第一数字信号，以产生第二k位数字信号。 乘法器将第一和第二数字信号相乘并给出相位差信号。

公开(公告)号：US4628507A

公开(公告)日：1986-12-09

申请号：US599362

申请日：1984-04-12

申请人： Susumu Otani

发明人： Susumu Otani

IPC分类号： H04L1/00 ,  H04L1/24 ,  H04L25/02 ,  H04L27/00 ,  H04L27/18 ,  H04L27/227 ,  H04B17/00 ,  G06F11/00

CPC分类号： H04L27/2275 ,  H04L1/241

摘要： A bit errror detection circuit for checking the quality of a transmission path by accurately predicting a true bit error rate (BER) despite changes in the operating point of a non-linear element or fluctuations in the level of an input signal. An inputted PSK-modulated carrier wave is separately phase demodulated by a recovered carrier wave and a phase modulated carrier wave. These two phase demodulated PSK-modulated carrier waves are inputted into separate discriminator circuits 412 and 413 having a common discrimination level where the difference between the outputs can be compared by the comparator circuit 409 to predict a true BER.

摘要翻译： 一种误差检测电路，用于通过精确地预测非线性元件的工作点的变化或者输入信号的电平的波动来精确地预测真实误码率（BER）来检查传输路径的质量。 输入的PSK调制载波被恢复的载波和相位调制载波分别相位解调。 这两个相位解调的PSK调制载波被输入到具有共同鉴别电平的分离鉴频器电路412和413中，其中可以通过比较器电路409比较输出之间的差来预测真实BER。

公开(公告)号：US4607377A

公开(公告)日：1986-08-19

申请号：US603818

申请日：1984-04-25

申请人： Masaaki Atobe ,  Susumu Otani

发明人： Masaaki Atobe ,  Susumu Otani

IPC分类号： H04L25/03 ,  H04B3/04

CPC分类号： H04L25/03133

摘要： Optimum tap coefficients corresponding to equalization characteristics are stored in a memory circuit and when an equalization characteristics is designated, an optimum tap coefficient is read out of the memory circuit and a transversal type equalizer is controlled by the read-out optimum tap coefficient. According to a modified embodiment, where a tap coefficient for a combined characteristic based on a combination of a plurality of transmission characteristics is necessary, a convolution operation of the tap coefficients for respective transmission characteristics is effected to determine a new tap coefficient which is used to set taps of the transversal type equalizer.

摘要翻译： 对应于均衡特性的最佳抽头系数存储在存储器电路中，并且当指定均衡特性时，从存储器电路中读出最佳抽头系数，并且通过读出的最佳抽头系数来控制横向型均衡器。 根据修改的实施例，其中需要基于多个传输特性的组合的组合特征的抽头系数，对各个传输特性进行抽头系数的卷积运算，以确定用于 设置横向型均衡器的抽头。

公开(公告)号：US5073906A

公开(公告)日：1991-12-17

申请号：US624201

申请日：1990-12-06

申请人： Susumu Otani ,  Syouji Endo

发明人： Susumu Otani ,  Syouji Endo

IPC分类号： H04L7/08 ,  H04L7/02 ,  H04L7/04

CPC分类号： H04L7/042

摘要： A synchronization (sync) word detection apparatus which, on receiving a signal in which a sync word having a predetermined length (N) is inserted beforehand, detects the sync word out of a demodulated and soft-decided sequence of the received signal. A cross correlator (4) calculates a cross correlation value of the soft-decided and demodulated sequence fed thereto and the sync word. A threshold generating section (1, 2, 3) determines a means power of the demodulated and soft-decided sequence and generates a threshold value on the basis of the mean power. A comparing circuit (5) produces a detection signal when the cross correlation exceeds the threshold value. The apparatus reduces the false detection probability and misdetection prbability even when the receive field intensity sharply changes on a transmission path.

公开(公告)号：US4871975A

公开(公告)日：1989-10-03

申请号：US289617

申请日：1988-12-23

申请人： Hizuru Nawata ,  Susumu Otani

发明人： Hizuru Nawata ,  Susumu Otani

IPC分类号： H04L27/38 ,  H04L7/04 ,  H04L27/00 ,  H04L27/22 ,  H04L27/227

CPC分类号： H04L27/2273 ,  H04L2027/0028 ,  H04L2027/0057 ,  H04L2027/0069 ,  H04L7/046

摘要： A carrier recovery circuit comprises a voltage-controlled oscillator with a .pi./2 phase shifter coupled to it for generating carriers of quadrature phase relationship. First and second phase comparators respectively detect phase differences between an offset QPSK modulated signal and the carriers of the quadrature phase relationship. Signal from the first phase comparator is delayed by a 1/2 symbol duration and applied to one input of a quadri-phase detector having stable phase angles at .pi./4, (3/4).pi., (5/4).pi. and (7/4).pi. radian and signal from the second phase comparator is applied to the other input of the quadri-phase detector. A bit timing recovery field (1010 . . . 1010) of the second channel is detected from the output of the second phase comparator. Signal from the quadri-phase detector is applied to a loop filter and thence to the voltage-controlled oscillator during the time when a bit timing recovery field (BTR) of the second channel is not still detected. To stabilize the operation of the carrier recovery loop of the circuit, the output of the second phase comparator from which that BTR is detected is briefly applied to the loop filter in response to the detection of a BTR of the second channel, instead of the signal from the quadri-phase detector.

公开(公告)号：US4853642A

公开(公告)日：1989-08-01

申请号：US213368

申请日：1988-06-30

申请人： Susumu Otani ,  Motoya Iwasaki

发明人： Susumu Otani ,  Motoya Iwasaki

IPC分类号： H03L7/12 ,  H04L27/00 ,  H04L27/227

CPC分类号： H04L27/2273 ,  H03L7/12 ,  H04L2027/0067 ,  H04L2027/0069 ,  Y10S331/02

摘要： In a phase controlled demodulator, a modulated digital input signal is demodulated into quadrature signals with a carrier recovered by a voltage controlled oscillator. A phase difference between the quadrature signals is detected by a phase detector of Costas loop and applied through a loop filter to the voltage controlled oscillator to control the frequency and phase of the recovered carrier when the frequency deviation between the received and recovered carriers is within a phase control range. When the frequency deviation exceeds the phase control range, the output of the phase detector is a beat of the two carriers and a frequency sweep control voltage is applied to the VCO to search for the missing carrier. The magnitude of the beat is detected and compared with a predetermined threshold value. When the frequency deviation is far beyond the control range, the magnitude of the beat is lower than the threshold, but exceeds it at the instant the demodulator enters the control range, whereupon the frequency sweep control voltage is removed from the VCO.