公开(公告)号：US5822775A

公开(公告)日：1998-10-13

申请号：US992648

申请日：1992-12-18

申请人： Shuhei Sudo ,  Makio Yamaki

发明人： Shuhei Sudo ,  Makio Yamaki

IPC分类号： G06F9/38 ,  G06F9/24 ,  G06F9/312 ,  G10K15/12 ,  H03H17/00 ,  H03H17/02 ,  G06F12/00

CPC分类号： G06F9/30043

摘要： A coefficient data transfer processing method for a digital signal processor which has a coefficient address pointer independent of a program counter, whereby a processing program and coefficient data are transferred and supplied from a microcomputer determination, whether an instruction is a read instruction of the coefficient data to execute a read cycle steal or with is made; a value of a program counter with is made; when it is the read instruction, new coefficient data is transferred from the microcomputer to a transfer buffer at an instruction read stage and instruction decode stage in a processing unit; and the coefficient data stored in the transfer buffer is written into a coefficient data memory by the read cycle steal at an execute stage in the same processing unit.

摘要翻译： 一种用于数字信号处理器的系数数据传送处理方法，其具有独立于程序计数器的系数地址指针，由微处理器确定传送和提供处理程序和系数数据，指令是否是系数数据的读取指令 执行读周期窃取或与之进行; 制作了一个程序计数器的值; 当读取指令时，新的系数数据从处理单元中的指令读取级和指令解码级从微型计算机传送到传送缓冲器; 并且存储在传送缓冲器中的系数数据在同一处理单元中的执行阶段通过读取周期被窃取被写入系数数据存储器。

公开(公告)号：US5331582A

公开(公告)日：1994-07-19

申请号：US990168

申请日：1992-12-14

申请人： Shuhei Sudo ,  Makio Yamaki

发明人： Shuhei Sudo ,  Makio Yamaki

IPC分类号： G06F7/556 ,  G06F1/02

CPC分类号： G06F7/556

摘要： A digital signal processor (DSP) computes logarithmic values for data values of the input signal by using an approximation formula expanded into power series. To reduce the number of computing steps, the processor includes a shift circuit for shifting an input data value into a predetermined range of numeric values, a high-order coefficient memory for storing coefficient values of high order coefficients other than a zero-order coefficient of the approximation formula for data values within the predetermined range of numeric values, a zero-order coefficient memory for storing a coefficient value of the zero-order coefficient shifted according to the number of digits shifted by the shift circuit, and an address specifying circuit for specifying a reading address of the zero-order memory corresponding to the number of digit shifted by the shifted circuit. Also, a DSP computes an inverse logarithmic value of a data value of the input signal by using an approximation formula expanded into power series. The processor includes a summing circuit for summing a specific value to an input data value so that a summed value falls within a predetermined range of numeric values, a coefficient memory for storing coefficient values of the approximation formula for data values within the predetermined range of numeric values, and a shift circuit for shifting a result of computation performed by using the approximation formula by a number of digits corresponding to the specific value summed by the summing circuit.

摘要翻译： 数字信号处理器（DSP）通过使用扩展为幂级数的近似公式来计算输入信号的数据值的对数值。 为了减少计算步骤的数量，处理器包括用于将输入数据值移位到预定数值范围的移位电路，用于存储除零序系数以外的高次系数的系数值的高阶系数存储器 在数值的预定范围内的数据值的近似公式，用于存储根据由移位电路偏移的位数移位的零级系数的系数值的零级系数存储器，以及用于 指定对应于由移位电路移位的数字数量的零级存储器的读取地址。 此外，DSP通过使用扩展为幂级数的近似公式来计算输入信号的数据值的对数值。 该处理器包括：求和电路，用于将特定值与输入数据值进行求和，使得相加的值落在预定的数值范围内;系数存储器，用于存储数字值的数学值的系数值，该数据值在预定数值范围内 值和移位电路，用于将通过使用近似公式执行的计算结果移位与由求和电路相加的特定值相对应的位数。