公开(公告)号：US08586419B2

公开(公告)日：2013-11-19

申请号：US12730230

申请日：2010-03-24

申请人： Serge Jaunay ,  Suresh Belani ,  Frank Kuo ,  Sen Mao ,  Peter Wang

发明人： Serge Jaunay ,  Suresh Belani ,  Frank Kuo ,  Sen Mao ,  Peter Wang

IPC分类号： H01L21/00

CPC分类号： H01L24/73 ,  H01L23/3107 ,  H01L23/49548 ,  H01L23/49562 ,  H01L24/16 ,  H01L24/32 ,  H01L24/36 ,  H01L24/40 ,  H01L24/97 ,  H01L2224/16245 ,  H01L2224/40245 ,  H01L2224/73253 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

摘要： The present technology is directed toward semiconductors packaged by electrically coupling a plurality of die to an upper and lower lead frame. The opposite edges of each corresponding set of leads in the upper lead frame are bent. The leads in the upper lead frame are electrically coupled between respective contacts on respective die and respective lower portion of the leads in the lower lead frame. The bent opposite edges of each corresponding set of leads of the upper lead frame support the upper lead frame before encapsulation, for achieving a desired position of the plurality of die between the leads of the upper and lower lead frames in the packaged semiconductor. After the encapsulated die are separated, the upper leads have an L-shape and electrically couple die contacts on upper side of the die to leads on the lower side of the die so that the package contacts are on the same side of the semiconductor package.

摘要翻译： 本技术涉及通过将多个管芯电耦合到上引线框架和下引线框架而封装的半导体。 上引线框架中的每个相应引线组的相对边缘弯曲。 上引线框架中的引线电耦合在相应管芯上的相应触头和下引线框架中引线的相应下部。 上引线框架的每个相应的引线组的弯曲的相对边缘在封装之前支撑上引线框架，以在封装半导体中实现上引脚和下引线框架的引线之间的多个管芯的期望位置。 在封装的芯片被分离之后，上部引线具有L形并且在芯片的上侧上电耦合管芯触头，以在芯片的下侧引出引线，使得封装触点位于半导体封装的同一侧。

公开(公告)号：US20110175217A1

公开(公告)日：2011-07-21

申请号：US12730230

申请日：2010-03-24

申请人： Serge Jaunay ,  Suresh Belani ,  Frank Kuo ,  Sen Mao ,  Peter Wang

发明人： Serge Jaunay ,  Suresh Belani ,  Frank Kuo ,  Sen Mao ,  Peter Wang

IPC分类号： H01L23/495 ,  H01L21/60 ,  H01L21/56 ,  H01L23/31

CPC分类号： H01L24/73 ,  H01L23/3107 ,  H01L23/49548 ,  H01L23/49562 ,  H01L24/16 ,  H01L24/32 ,  H01L24/36 ,  H01L24/40 ,  H01L24/97 ,  H01L2224/16245 ,  H01L2224/40245 ,  H01L2224/73253 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

摘要： The present technology is directed toward semiconductors packaged by electrically coupling a plurality of die to an upper and lower lead frame. The opposite edges of each corresponding set of leads in the upper lead frame are bent. The leads in the upper lead frame are electrically coupled between respective contacts on respective die and respective lower portion of the leads in the lower lead frame. The bent opposite edges of each corresponding set of leads of the upper lead frame support the upper lead frame before encapsulation, for achieving a desired position of the plurality of die between the leads of the upper and lower lead frames in the packaged semiconductor. After the encapsulated die are separated, the upper leads have an L-shape and electrically couple die contacts on upper side of the die to leads on the lower side of the die so that the package contacts are on the same side of the semiconductor package.

摘要翻译： 本技术涉及通过将多个管芯电耦合到上引线框架和下引线框架而封装的半导体。 上引线框架中的每个相应引线组的相对边缘弯曲。 上引线框架中的引线电耦合在相应管芯上的相应触头和下引线框架中引线的相应下部。 上引线框架的每个相应的引线组的弯曲的相对边缘在封装之前支撑上引线框架，以在封装半导体中实现上引脚和下引线框架的引线之间的多个管芯的期望位置。 在封装的芯片被分离之后，上部引线具有L形并且在芯片的上侧上电耦合管芯触头，以在芯片的下侧引出引线，使得封装触点位于半导体封装的同一侧。

公开(公告)号：US20060108671A1

公开(公告)日：2006-05-25

申请号：US10996148

申请日：2004-11-23

申请人： Mohammed Kasem ,  King Owyang ,  Frank Kuo ,  Serge Jaunay ,  Sen Mao ,  Oscar Ou ,  Peter Wang ,  Chang-Sheng Chen

发明人： Mohammed Kasem ,  King Owyang ,  Frank Kuo ,  Serge Jaunay ,  Sen Mao ,  Oscar Ou ,  Peter Wang ,  Chang-Sheng Chen

IPC分类号： H01L23/495

CPC分类号： H01L23/49548 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49562 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/84 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/73253 ,  H01L2224/83801 ,  H01L2224/84385 ,  H01L2224/84801 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A semiconductor package includes a die that is interposed, flip-chip style, between an upper lead frame and a lower lead frame. The lower lead frame has contacts that are aligned with terminals on the bottom surface of the die. The upper lead frame contacts a terminal on the top side of the die, and the edges of the upper lead frame are bent downward around the edges of the die, giving the upper lead frame a cup shape. The edge of the upper lead frame contact another portion of the lower lead frame, so that all of the contacts of the package are coplanar and can be surface-mounted on a printed circuit board. The terminals of the die are electrically connected to the lead frames by means of solder layers. The thicknesses of the respective solder layers that connect the die to the lead frames are predetermined to optimize the performance of the package through numerous thermal cycles. This is done by fabricating the lower lead frame with a plurality of mesas and using a double solder reflow process.

摘要翻译： 半导体封装包括在上引线框架和下引线框架之间插入倒装芯片的管芯。 下引线框架具有与芯片底表面上的端子对准的触点。 上引线框架接触管芯顶部的端子，并且上引线框架的边缘围绕模具的边缘向下弯曲，使上引线框架成杯形。 上引线框架的边缘接触下引线框架的另一部分，使得封装的所有触点是共面的，并且可以表面安装在印刷电路板上。 芯片的端子通过焊料层电连接到引线框架。 预定了将管芯与引线框架连接的各个焊料层的厚度，以通过许多热循环来优化封装的性能。 这是通过用多个台面制造下引线框架并使用双重回流焊工艺来完成的。

公开(公告)号：US20060110856A1

公开(公告)日：2006-05-25

申请号：US10996149

申请日：2004-11-23

申请人： Mohammed Kasem ,  King Owyang ,  Frank Kuo ,  Serge Jaunay ,  Sen Mao ,  Oscar Ou ,  Peter Wang ,  Chang-Sheng Chen

发明人： Mohammed Kasem ,  King Owyang ,  Frank Kuo ,  Serge Jaunay ,  Sen Mao ,  Oscar Ou ,  Peter Wang ,  Chang-Sheng Chen

IPC分类号： H01L21/44

CPC分类号： H01L23/49562 ,  H01L23/49524 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/16245 ,  H01L2224/26175 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/73153 ,  H01L2224/73253 ,  H01L2224/81192 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

摘要： A semiconductor package includes a die that is interposed, flip-chip style, between an upper lead frame and a lower lead frame. The lower lead frame has contacts that are aligned with terminals on the bottom surface of the die. The upper lead frame contacts a terminal on the top side of the die, and the edges of the upper lead frame are bent downward around the edges of the die, giving the upper lead frame a cup shape. The edge of the upper lead frame contact another portion of the lower lead frame, so that all of the contacts of the package are coplanar and can be surface-mounted on a printed circuit board. The terminals of the die are electrically connected to the lead frames by means of solder layers. The thicknesses of the respective solder layers that connect the die to the lead frames are predetermined to optimize the performance of the package through numerous thermal cycles. This is done by fabricating the lower lead frame with a plurality of mesas and using a double solder reflow process.

摘要翻译： 半导体封装包括在上引线框架和下引线框架之间插入倒装芯片的管芯。 下引线框架具有与芯片底表面上的端子对准的触点。 上引线框架接触管芯顶部的端子，并且上引线框架的边缘围绕模具的边缘向下弯曲，使上引线框架成杯形。 上引线框架的边缘接触下引线框架的另一部分，使得封装的所有触点是共面的，并且可以表面安装在印刷电路板上。 芯片的端子通过焊料层电连接到引线框架。 预定了将管芯与引线框架连接的各个焊料层的厚度，以通过许多热循环来优化封装的性能。 这是通过用多个台面制造下引线框架并使用双重回流焊工艺来完成的。