公开(公告)号：US20070246075A1

公开(公告)日：2007-10-25

申请号：US11408311

申请日：2006-04-21

申请人： Sam Garcia ,  Edward Acosta ,  Varughese Mathew

发明人： Sam Garcia ,  Edward Acosta ,  Varughese Mathew

IPC分类号： B08B9/00 ,  B08B3/00

CPC分类号： B08B9/08 ,  C23C18/1625 ,  C23F1/16 ,  C23F1/44

摘要： A method for cleaning a metal plating tank is provided herein. In accordance with the method, the tank is exposed to a first acid (103), after which the tank is exposed to a second acid in the presence of a first oxidizing agent (107).

摘要翻译： 本发明提供一种清洗金属镀槽的方法。 根据该方法，将罐暴露于第一酸（103），之后在第一氧化剂（107）的存在下将罐暴露于第二种酸。

公开(公告)号：US20060202339A1

公开(公告)日：2006-09-14

申请号：US11078236

申请日：2005-03-11

申请人： Lynne Michaelson ,  Edward Acosta ,  Ritwik Chatterjee ,  Stanley Filipiak ,  Sam Garcia ,  Varughese Mathew

发明人： Lynne Michaelson ,  Edward Acosta ,  Ritwik Chatterjee ,  Stanley Filipiak ,  Sam Garcia ,  Varughese Mathew

IPC分类号： H01L21/4763

CPC分类号： H01L21/76849 ,  H01L21/76822 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76856

摘要： A diffusion barrier stack is formed by forming a layer comprising a metal over a conductor that includes copper; and forming a first dielectric layer over the layer, wherein the dielectric layer is of a thickness that alone it can not serve as a diffusion barrier layer to the conductor and the first dielectric layer prevents oxidation of the layer. In one embodiment, the diffusion barrier stack includes two layers; the first layer is a conductive layer and the second layer is a dielectric layer. The diffusion barrier stack minimizes electromigration and copper diffusion from the conductor.

摘要翻译： 通过在包括铜的导体上形成包括金属的层来形成扩散阻挡叠层; 以及在所述层上形成第一电介质层，其中所述电介质层的厚度单独地不能用作所述导体的扩散阻挡层，并且所述第一介电层防止所述层的氧化。 在一个实施例中，扩散阻挡堆叠包括两层; 第一层是导电层，第二层是电介质层。 扩散阻挡层将导电体的电迁移和铜扩散最小化。

公开(公告)号：US20060270234A1

公开(公告)日：2006-11-30

申请号：US11140162

申请日：2005-05-27

申请人： Varughese Mathew ,  Edward Acosta ,  Sam Garcia ,  Lynne Michaelson

发明人： Varughese Mathew ,  Edward Acosta ,  Sam Garcia ,  Lynne Michaelson

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/76849 ,  C11D3/2082 ,  C11D3/2086 ,  C11D3/3947 ,  C11D11/0047 ,  H01L21/02074

摘要： A method for making a semiconductor device includes cleaning a semiconductor wafer after a chemical mechanical polishing (CMP) process to remove or reduce particles of copper, a corrosion inhibitor such as triazole, and a copper oxide layer on the copper layer. In order to prepare for plating the copper layer with a layer that functions as a barrier to copper migration or diffusion, the surface of the copper layer and the dielectric layer are treated with an oxidant, a surfactant, and copper-chelating agent. The copper-chelating is preferably a mild acid such as an organic acid. The oxidant is particularly useful in removing the corrosion inhibitor. The barrier layer, preferably conductive, is then plated on the surface of the copper layer. Subsequent interlayer dielectric layers and copper layers follow that can use the same process.

摘要翻译： 制造半导体器件的方法包括在化学机械抛光（CMP）工艺之后清洗半导体晶片，以去除或减少铜的颗粒，诸如三唑的腐蚀抑制剂和铜层上的氧化铜层。 为了准备用作为阻挡铜迁移或扩散的层的铜层的电镀，铜层和电介质层的表面用氧化剂，表面活性剂和铜螯合剂处理。 铜螯合物优选为弱酸，例如有机酸。 氧化剂特别适用于去除腐蚀抑制剂。 然后将优选导电的阻挡层电镀在铜层的表面上。 随后的层间电介质层和铜层可以使用相同的工艺。

公开(公告)号：US20050266664A1

公开(公告)日：2005-12-01

申请号：US10857726

申请日：2004-05-28

申请人： Michael Harrison ,  Olubunmi Adetutu ,  Sam Garcia

发明人： Michael Harrison ,  Olubunmi Adetutu ,  Sam Garcia

IPC分类号： H01L21/28 ,  H01L21/324 ,  H01L21/44

CPC分类号： H01L21/324 ,  H01L21/28097

摘要： A method for forming an improved fully silicided gate electrode in a semiconductor device in which the fully silicided gate electrode is formed using indirect heating. One embodiment relates to a method of manufacturing at least one semiconductor device. The method includes depositing silicon to a first thickness, depositing metal over the silicon, and indirectly heating the metal and silicon to form a metal silicide having a second thickness not less than the first thickness. Another embodiment relates to a method of manufacturing semiconductor devices, each semiconductor device having a fully silicided control electrode. The method includes providing a substrate, forming a dielectric layer over the substrate, forming a silicon-containing layer over the dielectric layer, depositing a metal-containing layer over the silicon-containing layer, and indirectly heating the metal-containing and silicon-containing layers to form a silicide layer in contact with the dielectric layer.

摘要翻译： 一种在半导体器件中形成改进的全硅化物栅电极的方法，其中使用间接加热形成全硅化栅电极。 一个实施例涉及制造至少一个半导体器件的方法。 该方法包括将硅沉积到第一厚度，在硅上沉积金属，并间接加热金属和硅以形成具有不小于第一厚度的第二厚度的金属硅化物。 另一实施例涉及制造半导体器件的方法，每个半导体器件具有完全硅化的控制电极。 该方法包括提供衬底，在衬底上形成电介质层，在电介质层上形成含硅层，在含硅层上沉积含金属层，并间接加热含金属和含硅的 以形成与介电层接触的硅化物层。

公开(公告)号：US20050048773A1

公开(公告)日：2005-03-03

申请号：US10650002

申请日：2003-08-27

申请人： Varughese Mathew ,  Sam Garcia ,  Christopher Prindle

发明人： Varughese Mathew ,  Sam Garcia ,  Christopher Prindle

IPC分类号： C23C18/34 ,  H01L21/288 ,  H01L21/768 ,  H01L23/532 ,  H01L21/20 ,  H01L21/44

CPC分类号： H01L21/76849 ,  H01L21/288 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electroless plating process for forming a barrier film such as a cobalt tungsten boron film on copper interconnects lines of semiconductor wafers uses a plating bath of morpholine borane which provides higher thermal stability and range, allowing for greater compatibility with low k dielectric materials. Mixed chelating agents with different stability constants with a metal source are used to complex base metal such as copper which dissolves into solution, if any. A fluorosurfactant is used as a wetting agent and stabilizer.

公开(公告)号：US5801098A

公开(公告)日：1998-09-01

申请号：US708245

申请日：1996-09-03

申请人： Robert Fiordalice ,  Sam Garcia ,  T. P. Ong

发明人： Robert Fiordalice ,  Sam Garcia ,  T. P. Ong

IPC分类号： H01L21/768 ,  H01L21/441

CPC分类号： H01L21/76838

摘要： A method of decreasing resistivity in an electrically conductive layer (23) includes providing a substrate (14), using a high density plasma sputtering technique to deposit the electrically conductive layer (23) over the substrate (14), and exposing the electrically conductive layer (23) to an anneal in an ambient comprised of a plasma (21).

摘要翻译： 一种降低导电层（23）中的电阻率的方法包括：使用高密度等离子体溅射技术提供衬底（14），以将导电层（23）沉积在衬底（14）上，以及使导电层 （23）在由等离子体（21）组成的环境中进行退火。

公开(公告)号：US20070049008A1

公开(公告)日：2007-03-01

申请号：US11215375

申请日：2005-08-26

申请人： Gerald Martin ,  Sam Garcia ,  Varughese Mathew

发明人： Gerald Martin ,  Sam Garcia ,  Varughese Mathew

IPC分类号： H01L21/4763

CPC分类号： H01L21/76849 ,  H01L21/7684

摘要： A method for making a semiconductor device includes forming a patterned dielectric overlying active circuitry, the patterned dielectric having a plurality of cavities. A diffusion barrier is formed over the patterned dielectric. A conductive layer is formed over the diffusion barrier in the plurality of cavities. The conductive layer is etched back to be below a top surface of the dielectric, forming recessed areas over the conductive layers in the plurality of cavities. The recessed areas are then filled with a capping film. The capping film and the diffusion barrier are removed to provide a relatively smooth planarized surface. Providing a relatively smooth planarized surface reduces leakage currents between conductors.

摘要翻译： 制造半导体器件的方法包括形成覆盖有源电路的图案化电介质，所述图案化电介质具有多个空腔。 在图案化电介质上形成扩散阻挡层。 在多个空腔中的扩散阻挡层上形成导电层。 导电层被回蚀刻到电介质的顶表面之下，在多个空腔中的导电层上形成凹陷区域。 然后用封盖膜填充凹进的区域。 去除覆盖膜和扩散阻挡层以提供相对光滑的平坦化表面。 提供相对平滑的平坦化表面减少导体之间的漏电流。