摘要:
Two related extended precision operand formats provide for efficient multiply/accumulate operations in a SIMD data processing system. Each format utilizes a group of “b” bit elements in a vector register. Each of the elements provides “m” bits of precision, with b>m. The remaining b−m bits in each element accumulate overflows and carries across multiple additions and subtractions. Existing SIMD multiply-sum instructions can be used to efficiently take input operands from the first format and produce output results in the second extended precision format when b2=2b1 and m2=2m1.
摘要:
A floating point unit (60) capable of executing projection instructions provides performance improvement in multiple precision floating point arithmetic. The projection instructions provide for obtaining partial sequences of numbers, products, and sums which have definite alignments and widths which a programmer can set. This allows very fast computation of both individual intermediate computations and final results. A range projection instruction (210, 410) builds a mask with an exponent from one source (230, 430) and a mantissa from another (240, 440). A project instruction (610) builds a result by masking (660) mantissa bits in a source operand after alignment (630) with a mask. Projection multiply (810), add (1000), and subtract instructions build results by masking (850, 1070) mantissa bits of unrounded partial results after alignment (830, 1020, 1040) with a mask.
摘要:
A native microprocessor (20) accesses a foreign block of computer code. An initial block scope defining translation parameters is assigned to the block (106). The block of "foreign" code is translated to "native" code (108). An optimization efficiency is calculated for the translated block (110). A rescheduling criterion is established based on the optimization efficiency (112). The block of native code is executed (114). On subsequent accesses of the block when the reschedule criterion is met (116) the block scope is redefined (118).
摘要:
An alert system detects when an auditory prosthesis recipient is wearing her sound processor. When the processor is not worn, the alert system signals a secondary device, such as an accessory, to provide some other form of tactile stimulation to allow the recipient to be made aware of certain auditory stimuli she is not receiving via the auditory prosthesis. Thus, the alert system can effectively “hear” for the recipient. Since many auditory prosthesis recipients are, for all practical purposes, completely deaf without their external sound processors attached and operational, such an alert system increases the recipient's safety, convenience, and quality of life.
摘要:
A method and apparatus for finding the hard-to-round double precision operands x when processed by a function f(x)and using these hard-to-round numbers to optimize f(x) hardware and software f(x) algorithms to ensure proper rounding begins by segmenting all proper x operands into analysis domains (FIG. 8). The analysis domains are split into sub-domains (1202-1208) where a linear generator is used to generate candidate hard-to-find values for each sub-domain (1210). A quadratic filter is used to reduce the list of candidates to a final list of hard-to-round values for f(x) (1212). The hard-to-round double precision values are used to set a precision of hardware or software f(x) algorithm to ensure proper rounding or all valid x operations while simultaneously ensuring that too much precision, and therefore, reduced performance, is avoided.