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公开(公告)号：US20100162063A1
公开(公告)日：2010-06-24
申请号：US12591430
申请日：2009-11-19
CPC分类号： G06F1/10 , G06F1/3203 , G06F1/3237 , Y02D10/128
摘要： Clock signal control circuitry is disclosed along with a method for switching a clock between modes and a computer program product. The clock signal control circuitry is for receiving a clock signal from a clock signal generator and for outputting said clock signal to synchronous circuitry that is to be clocked by said clock signal. It comprises: an input for receiving mode switching signals indicating said synchronous circuitry is to switch between modes, said mode switching signals comprising a clock gating request signal indicating said synchronous circuitry is to enter a sleep mode during which said circuitry is not clocked and a wake up request signal indicating said synchronous circuitry is to enter an operational mode during which said circuitry is clocked; and is responsive to said clock gating request signal to gate said clock signal such that no clock signal is output to said synchronous circuitry and being responsive to said wake up request signal to output said clock signal to said synchronous circuitry. The clock signal control circuitry further comprises: a data store for storing a delay value; and delay circuitry for delaying switching of said clock signal between modes in response to at least one of said mode switching signals, said delay circuitry delaying said switching by an amount dependent upon said stored delay value.
摘要翻译： 公开了时钟信号控制电路以及用于在模式和计算机程序产品之间切换时钟的方法。 时钟信号控制电路用于从时钟信号发生器接收时钟信号，并将所述时钟信号输出到由所述时钟信号定时的同步电路。 它包括：用于接收指示所述同步电路的模式切换信号的输入是在模式之间切换，所述包括指示所述同步电路的时钟门控请求信号的模式切换信号是进入休眠模式，在该模式期间所述电路不被计时，并且唤醒 指示所述同步电路的上电请求信号将进入所述电路被计时的操作模式; 并且响应于所述时钟选通请求信号来选通所述时钟信号，使得没有时钟信号被输出到所述同步电路并响应于所述唤醒请求信号将所述时钟信号输出到所述同步电路。 时钟信号控制电路还包括：用于存储延迟值的数据存储器; 以及延迟电路，用于响应于所述模式切换信号中的至少一个来延迟所述时钟信号在模式之间的切换，所述延迟电路将所述切换延迟一个取决于所述存储的延迟值的量。
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公开(公告)号：US08352794B2
公开(公告)日：2013-01-08
申请号：US12591430
申请日：2009-11-19
IPC分类号： G06F11/00
CPC分类号： G06F1/10 , G06F1/3203 , G06F1/3237 , Y02D10/128
摘要： Clock signal control circuitry is disclosed along with a method for switching a clock between modes and a computer program product. The clock signal control circuitry is for receiving a clock signal from a clock signal generator and for outputting said clock signal to synchronous circuitry that is to be clocked by said clock signal. It comprises: an input for receiving mode switching signals indicating said synchronous circuitry is to switch between modes, said mode switching signals comprising a clock gating request signal indicating said synchronous circuitry is to enter a sleep mode during which said circuitry is not clocked and a wake up request signal indicating said synchronous circuitry is to enter an operational mode during which said circuitry is clocked; and is responsive to said clock gating request signal to gate said clock signal such that no clock signal is output to said synchronous circuitry and being responsive to said wake up request signal to output said clock signal to said synchronous circuitry. The clock signal control circuitry further comprises: a data store for storing a delay value; and delay circuitry for delaying switching of said clock signal between modes in response to at least one of said mode switching signals, said delay circuitry delaying said switching by an amount dependent upon said stored delay value.
摘要翻译： 公开了时钟信号控制电路以及用于在模式和计算机程序产品之间切换时钟的方法。 时钟信号控制电路用于从时钟信号发生器接收时钟信号，并将所述时钟信号输出到由所述时钟信号定时的同步电路。 它包括：用于接收指示所述同步电路的模式切换信号的输入是在模式之间切换，所述包括指示所述同步电路的时钟门控请求信号的模式切换信号是进入休眠模式，在该模式期间所述电路不被计时，并且唤醒 指示所述同步电路的上电请求信号将进入所述电路被计时的操作模式; 并且响应于所述时钟选通请求信号来选通所述时钟信号，使得没有时钟信号被输出到所述同步电路并响应于所述唤醒请求信号将所述时钟信号输出到所述同步电路。 时钟信号控制电路还包括：用于存储延迟值的数据存储器; 以及延迟电路，用于响应于所述模式切换信号中的至少一个来延迟所述时钟信号在模式之间的切换，所述延迟电路将所述切换延迟一个取决于所述存储的延迟值的量。
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