Abstract:
A system and method of using a computer processor (34) to generate a solution to a linear system of equations is provided. The computer processor (34) executes a Jacobi iterative technique to produce outputs representing the solution. Multiplication operations required by the iterative technique are performed using logarithmic arithmetic. With logarithmic arithmetic, a multiplication operation is accomplished using addition. For a given n.times.n matrix A, the computer processor (34) can compute an inverse matrix A.sup.-1 by repeatedly executing the iterative technique to solve n linear systems.
Abstract:
A video signal is converted into a coefficient signal for each frame in a video image. Each coefficient signal comprises block coefficient signals which represent the pixels in a pixel map block (420) in a pixel map (410) with the coefficients in a hybrid polynomial. The coefficient signal for only selected frames is transmitted to a receiving computer (130). The coefficient signals are selected based on a number of coefficients in the coefficient signal for a current frame that vary from corresponding coefficients in the coefficient signal for a sequentially previous frame.
Abstract:
Polynomial processors learn expert system rules, for either business or real-time applications, to improve the robustness and speed of execution of the expert system. One or more polynomial processors are constructed which incorporate the production rules of one or more expert systems. Each polynomial processor is constructed of computing elements or neuron circuits each having only one significant processing element in the form of a multiplier. Each polynomial processor utilizes a training algorithm which does not require repetitive training and which yields a global minimum to each given set of input vectors.
Abstract:
A video signal is converted into compressed frame signals, each comprising a coefficient signal of block coefficient signals for each frame in a video image. Each of the block coefficient signals represents the pixels in a pixel map block (420) with the coefficients in a hybrid polynomial. The hybrid polynomial contains discrete cosine terms, a constant term separated from the discrete cosine terms, and polynomial terms extracted from the discrete cosine terms. Each block coefficient signal contains a background component representing a coefficient of the constant term, a linear component representing the coefficients of the polynomial terms, and a nonlinear component representing the coefficients of the discrete cosine terms.
Abstract:
An artificial neuron, which may be implemented on an integrated circuit, has only one significant processing element in the form of an adder. Inputs are first fed through gating functions to produce gated inputs. These gated inputs are then added together to produce a sum which is added to a weight to produce the neuron output.
Abstract:
An artificial neuron, which may be implemented on an integrated circuit, has only one significant processing element in the form of an adder. Inputs are first fed through gating functions to produce gated inputs. These gated inputs are then added together to produce a sum which is added to a weight to produce the neuron output.
Abstract:
A system polynomial is determined using a plurality of system I/O data, wherein the system polynomial expresses the system output in terms of the system input, and wherein the system polynomial has r' terms including at least one linear term and at least one nonlinear term, the r' terms found using a regression subsets technique. A control polynomial is determined, the control polynomial having at least one cancellation term and at least one control term, the at least one cancellation term calculated to cancel the at least one nonlinear term of the system polynomial, and the at least one control term calculated to control the at least one linear term of the system polynomial. A control output signal is generated based on the control polynomial and the control input signal.
Abstract:
A neural network, which may be implemented either in hardware or software, is constructed of neurons or neuron circuits each having only one significant processing element in the form of a multiplier. A hidden neuron in the neural network generates an output based on the product of a plurality of functions. The neural network utilizes a training algorithm which does not require repetitive training and which yields a global minimum to each given set of input vectors.
Abstract:
A speech-recognition system for recognizing isolated words includes pre-processing circuitry for performing analog-to-digital conversion and cepstral analysis, and a plurality of neural networks which compute discriminant functions based on polynomial expansions. The system may be implemented using either hardware or software or a combination thereof. The speech wave-form of a spoken word is analyzed and converted into a sequence of data frames. The sequence of frames is partitioned into data blocks, and the data blocks are then broadcast to a plurality of neural networks. Using the data blocks, the neural networks compute polynomial expansions. The output of the neural networks is used to determine the identity of the spoken word. The neural networks utilize a matrix-inversion or alternatively a least-squares estimation training algorithm which does not require repetitive training and which yields a global minimum to each given set of training examples.
Abstract:
An artificial neuron, which may be implemented either in hardware or software, has only one significant processing element in the form of a multiplier. Inputs are first fed through gating functions to produce gated inputs. These gated inputs are then multiplied together to produce a product which is multiplied by a weight to produce the neuron output.