Phase locked loop frequency synthesizer circuit with improved noise performance
    1.
    发明授权
    Phase locked loop frequency synthesizer circuit with improved noise performance 有权
    具有改善噪声性能的锁相环频率合成器电路

    公开(公告)号:US08638143B2

    公开(公告)日:2014-01-28

    申请号:US13511603

    申请日:2010-11-16

    IPC分类号: H03L7/06

    摘要: A phase locked loop frequency synthesizer comprises a voltage controlled oscillator; a loop filter for supplying a control voltage to the oscillator; a phase frequency detector arranged to detect a phase difference between a reference signal and a feedback signal generated from the oscillator signal and generate pulses on detector signals (UP/DN) dependent on the sign of the phase difference; and a charge pump (61) comprising current generating means and controlled switches (64, 65) arranged to convert pulses on the detector signals to current pulses from a reference voltage (Vdd′) to a common terminal (Vloop) connected to the loop filter or to current pulses from the common terminal to ground. The current generating means comprises at least one resistor (62, 63) connected between the common terminal and the switches, and the charge pump comprises an operational amplifier (66) coupled to keep the reference voltage at twice the voltage at the common terminal.

    摘要翻译: 锁相环频率合成器包括压控振荡器; 用于向振荡器提供控制电压的环路滤波器; 相位频率检测器,被配置为检测参考信号和从振荡器信号产生的反馈信号之间的相位差,并根据相位差的符号在检测器信号(UP / DN)上产生脉冲; 以及电荷泵(61),包括电流产生装置和受控开关(64,65),其被布置成将检测器信号上的脉冲转换成从参考电压(Vdd')到连接到环路滤波器的公共端子(V loop)的电流脉冲 或从公共端到地的电流脉冲。 电流产生装置包括连接在公共端子和开关之间的至少一个电阻器(62,63),并且电荷泵包括耦合以将参考电压保持在公共端子处的电压的两倍的运算放大器(66)。

    Phase Locked Loop Frequency Synthesizer Circuit with Improved Noise Performance
    2.
    发明申请
    Phase Locked Loop Frequency Synthesizer Circuit with Improved Noise Performance 有权
    具有改善噪声性能的锁相环频率合成器电路

    公开(公告)号:US20120274372A1

    公开(公告)日:2012-11-01

    申请号:US13511603

    申请日:2010-11-16

    IPC分类号: H03L7/06

    摘要: A phase locked loop frequency synthesizer comprises a voltage controlled oscillator; a loop filter for supplying a control voltage to the oscillator; a phase frequency detector arranged to detect a phase difference between a reference signal and a feedback signal generated from the oscillator signal and generate pulses on detector UP signals (UP/DN) dependent on the sign of the phase difference; and a charge pump (61) comprising current generating means and controlled switches (64, 65) arranged to convert pulses on the detector signals to current pulses from a reference voltage (Vdd′) to a common terminal (Vloop) connected to the loop filter or to current pulses from the common terminal to ground. The current generating means comprises at least one resistor (62, 63) connected between the common terminal and the switches, and the charge pump comprises an operational amplifier (66) coupled to keep the reference voltage at twice the voltage at the common terminal.

    摘要翻译: 锁相环频率合成器包括压控振荡器; 用于向振荡器提供控制电压的环路滤波器; 相位频率检测器,被配置为检测参考信号和从振荡器信号产生的反馈信号之间的相位差,并根据相位差的符号在检测器UP信号(UP / DN)上生成脉冲; 以及电荷泵(61),包括电流产生装置和受控开关(64,65),其被布置成将检测器信号上的脉冲转换成从参考电压(Vdd')到连接到环路滤波器的公共端子(V loop)的电流脉冲 或从公共端到地的电流脉冲。 电流产生装置包括连接在公共端子和开关之间的至少一个电阻器(62,63),并且电荷泵包括耦合以将参考电压保持在公共端子处的电压的两倍的运算放大器(66)。

    Multiple antenna receiver
    3.
    发明授权
    Multiple antenna receiver 有权
    多天线接收机

    公开(公告)号:US07929985B2

    公开(公告)日:2011-04-19

    申请号:US10427872

    申请日:2003-05-01

    IPC分类号: H04M1/00

    摘要: A wireless communication device includes at least two antennas with at least two corresponding receive chains. Selectively activating and deactivating the receivers as needed for a desired quality of reception controls the performance and power consumption of the wireless communication device. The wireless communication device may operate in a single receiver mode or a dual receiver diversity mode. In the dual receiver diversity mode, the wireless communication device may selectively control the gain of one or more antennas and/or reconfigure one or more receive chains to minimize power consumption while maintaining a desired performance.

    摘要翻译: 无线通信设备包括具有至少两个对应的接收链的至少两个天线。 根据所需的接收质量选择性地激活和去激活接收器来控制无线通信设备的性能和功耗。 无线通信设备可以在单个接收机模式或双重接收机分集模式下操作。 在双重接收机分集模式中,无线通信设备可以选择性地控制一个或多个天线的增益和/或重新配置一个或多个接收链,以最小化功耗,同时保持期望的性能。

    Delay calibration in polar modulation transmitters
    4.
    发明申请
    Delay calibration in polar modulation transmitters 有权
    极化调制发射机的延迟校准

    公开(公告)号:US20060057976A1

    公开(公告)日:2006-03-16

    申请号:US10940880

    申请日:2004-09-14

    申请人: Nikolaus Klemmer

    发明人: Nikolaus Klemmer

    IPC分类号: H04B1/02

    摘要: A method and apparatus for dynamically compensating for delay mismatch between a supply signal and an input signal of a power amplifier in polar modulation transmitters. One exemplary polar modulation transmitter according to the present invention comprises a power amplifier, a phase modulator, a regulator, a delay tracking circuit, and a delay circuit. The phase modulator derives the amplifier input signal responsive to one or more phase signals, while the regulator derives the amplifier supply signal responsive to an amplitude signal. Based on the amplitude signal and the amplifier supply signal, the delay tracking circuit tracks an observed amplitude path delay. The delay circuit adjusts a path delay associated with the phase signal, responsive to the observed amplitude path delay, to compensate for the delay mismatch.

    摘要翻译: 一种用于动态地补偿极性调制发射机中的功率放大器的电源信号和输入信号之间的延迟失配的方法和装置。 根据本发明的一个示例性极性调制发射机包括功率放大器,相位调制器,调节器,延迟跟踪电路和延迟电路。 响应于一个或多个相位信号,相位调制器导出放大器输入信号,而稳压器响应幅度信号导出放大器电源信号。 基于振幅信号和放大器电源信号,延迟跟踪电路跟踪观察到的振幅路径延迟。 延迟电路响应于观察到的幅度路径延迟来调整与相位信号相关联的路径延迟,以补偿延迟失配。

    Fractional frequency synthesizer
    5.
    发明申请
    Fractional frequency synthesizer 有权
    分数频率合成器

    公开(公告)号:US20050197073A1

    公开(公告)日:2005-09-08

    申请号:US10794830

    申请日:2004-03-05

    申请人: Nikolaus Klemmer

    发明人: Nikolaus Klemmer

    CPC分类号: H03L7/0996 H03L7/083 H03L7/16

    摘要: A frequency synthesizer circuit generates an output clock signal having a desired frequency relationship with an input reference signal, and offers essentially arbitrary relational values and adjustment resolution within any applicable circuit limits. The frequency synthesizer includes a ring oscillator circuit that provides multiple phases of its output clock signal, a phase selection circuit to select a phase of the output clock signal for feedback to an oscillator control circuit at each cycle of the reference signal according to a phase selection sequence. The oscillator control circuit generates a control signal responsive to comparing the selected phases of the output clock signal with the reference signal, and the phase selection circuit may include a modulator to generate phase selection sequences having desired time-average values that enable arbitrary frequency adjustability.

    摘要翻译: 频率合成器电路产生与输入参考信号具有期望频率关系的输出时钟信号,并且在任何适用的电路限制内提供基本上任意的关系值和调整分辨率。 频率合成器包括提供其输出时钟信号的多个相位的环形振荡器电路,相位选择电路,用于根据相位选择在参考信号的每个周期选择输出时钟信号的相位以反馈到振荡器控制电路 序列。 振荡器控制电路响应于将输出时钟信号的所选相位与参考信号进行比较而产生控制信号,并且相位选择电路可以包括调制器,以产生具有能够进行任意频率可调性的期望时间平均值的相位选择序列。

    Active load circuit with low impedance output
    6.
    发明授权
    Active load circuit with low impedance output 有权
    具有低阻抗输出的有源负载电路

    公开(公告)号:US06163235A

    公开(公告)日:2000-12-19

    申请号:US144945

    申请日:1998-09-01

    申请人: Nikolaus Klemmer

    发明人: Nikolaus Klemmer

    摘要: A transimpedance stage amplifier converts a current input signal at an input node to a low impedance output voltage at an output node. The amplifier includes a resistor connected between the input node and the output node. A feedback loop is connected across the resistor, the feedback loop comprising a transistor, the transistor using the current input signal as a biasing current.

    摘要翻译: 跨阻级放大器将输入节点处的电流输入信号转换为输出节点处的低阻抗输出电压。 放大器包括连接在输入节点和输出节点之间的电阻器。 反馈回路连接在电阻两端,反馈回路包括晶体管,晶体管使用电流输入信号作为偏置电流。

    RF low noise amplifier
    7.
    发明授权
    RF low noise amplifier 有权
    射频低噪声放大器

    公开(公告)号:US6150882A

    公开(公告)日:2000-11-21

    申请号:US215528

    申请日:1998-12-18

    申请人: Nikolaus Klemmer

    发明人: Nikolaus Klemmer

    IPC分类号: H03F3/45

    摘要: In a communication transceiver receiving a signal from a signal source defined by a source impedance between first and second nodes, an amplifier is provided having an input impedance matched to the source impedance. The amplifier includes a first transconductance cell having a first transconductance related to the input impedance and including first and second transistors each having control, supply and output elements. The first transconductance cell receives the signal from the signal source at the first and second control elements and develops a modified version of the signal as an output current signal at the first and second output elements, respectively. The first and second transistors are interconnected such that the control element of the first transistor is connected to the output element of the second transistor, and the control element of the second transistor is connected to the output element of the first transistor. The amplifier further includes a second transconductance cell having a second transconductance related to the input impedance and including third and fourth transistors connected to the first and second output elements. The second transconductance cell combines currents appearing at the first and second output elements and develops a combined output current signal at respective output terminals thereof.

    摘要翻译: 在通信收发信机中,从由第一和第二节点之间的源阻抗定义的信号源接收信号,提供具有与源阻抗匹配的输入阻抗的放大器。 放大器包括具有与输入阻抗相关的第一跨导的第一跨导单元,并且包括具有控制,电源和输出元件的第一和第二晶体管。 第一跨导单元在第一和第二控制元件处接收来自信号源的信号,并且分别在第一和第二输出元件处产生作为输出电流信号的信号的修改版本。 第一和第二晶体管被互连,使得第一晶体管的控制元件连接到第二晶体管的输出元件,第二晶体管的控制元件连接到第一晶体管的输出元件。 放大器还包括具有与输入阻抗相关的第二跨导的第二跨导单元,并且包括连接到第一和第二输出元件的第三和第四晶体管。 第二跨导单元组合出现在第一和第二输出元件处的电流,并在其各自的输出端产生组合的输出电流信号。

    Delay, Gain and Phase Estimation for Measurement Receivers
    8.
    发明申请
    Delay, Gain and Phase Estimation for Measurement Receivers 有权
    测量接收机的延迟,增益和相位估计

    公开(公告)号:US20110151800A1

    公开(公告)日:2011-06-23

    申请号:US12643529

    申请日:2009-12-21

    IPC分类号: H04B17/00

    CPC分类号: H04B17/10

    摘要: Phase and gain of a transmit signal are measured at a transmitter by determining a first time delay having a first resolution at a measurement receiver between a reference signal from which the transmit signal is generated and a measured signal derived from the transmit signal by comparing amplitudes of the reference signal and the measured signal. A second time delay having a second resolution finer than the first resolution is determined at the measurement receiver between the reference signal and the measured signal based on the first time delay. The reference signal and the measured signal are time aligned at the measurement receiver based on the second time delay and the phase and gain of the transmit signal are estimated after the reference signal and the measured signal are time aligned.

    摘要翻译: 发射信号的相位和增益通过在测量接收机处确定具有第一分辨率的第一时间延迟来测量,所述第一时间延迟在产生发射信号的参考信号与从发射信号导出的测量信号之间, 参考信号和测量信号。 基于第一时间延迟,在参考信号和测量信号之间的测量接收器处确定具有比第一分辨率更精细的第二分辨率的第二时间延迟。 参考信号和测量信号基于第二时间延迟在测量接收机处进行时间对准,并且在参考信号和测量信号被时间对准之后估计发射信号的相位和增益。

    Digitally controlled analog frequency synthesizer
    9.
    发明授权
    Digitally controlled analog frequency synthesizer 有权
    数字控制模拟频率合成器

    公开(公告)号:US07570123B2

    公开(公告)日:2009-08-04

    申请号:US11616598

    申请日:2006-12-27

    IPC分类号: H03B27/00

    CPC分类号: H03L7/091 H03L7/087 H03L7/093

    摘要: A frequency synthesizer according to the present invention digitally controls an analog oscillator to generate an analog output signal at a desired frequency. A digitizing circuit converts a feedback signal derived from the oscillator output signal to a digitized multi-phase feedback signal. A comparator compares the digitized multi-phase feedback signal to a reference signal generated by the reference signal generator to generate an error signal indicative of the phase error in the output signal. A control circuit generates a control signal based on the error signal to control the frequency of the oscillator output signal.

    摘要翻译: 根据本发明的频率合成器数字地控制模拟振荡器以期望的频率产生模拟输出信号。 数字化电路将从振荡器输出信号导出的反馈信号转换为数字化的多相反馈信号。 比较器将数字化的多相反馈信号与由参考信号发生器产生的参考信号进行比较,以产生指示输出信号中的相位误差的误差信号。 控制电路根据误差信号产生控制信号,以控制振荡器输出信号的频率。

    Amplifier systems with low-noise, constant-transconductance bias generators
    10.
    发明授权
    Amplifier systems with low-noise, constant-transconductance bias generators 有权
    具有低噪声,恒定跨导偏置发生器的放大器系统

    公开(公告)号:US07265625B2

    公开(公告)日:2007-09-04

    申请号:US11243831

    申请日:2005-10-04

    申请人: Nikolaus Klemmer

    发明人: Nikolaus Klemmer

    IPC分类号: H03F3/45

    CPC分类号: H03F3/45183 H03F1/301

    摘要: Amplifier systems are provided with bias generators that substantially stabilize operating points of system parameters (e.g., drain current and transconductance) over PVT variations, substantially reduce body effects and Early effects, and substantially reduce system output noise. These advantages are realized without significantly increasing system size and/or power consumption.

    摘要翻译: 放大器系统设置有偏置发生器,其基本上稳定了PVT变化的系统参数(例如,漏极电流和跨导)的工作点,从而显着降低了身体效应和早期效应,并显着降低了系统输出噪声。 这些优点在不显着增加系统尺寸和/或功率消耗的情况下实现。